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Searched refs:ip (Results 1 – 25 of 181) sorted by relevance

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/art/compiler/utils/
Dassembler_thumb_test_expected.cc.inc17 " 28: f8dd cffc ldr.w ip, [sp, #4092] ; 0xffc\n",
18 " 2c: f50d 5c80 add.w ip, sp, #4096 ; 0x1000\n",
19 " 30: f8dc c000 ldr.w ip, [ip]\n",
20 " 34: f8d9 c200 ldr.w ip, [r9, #512] ; 0x200\n",
21 " 38: f8dc 0080 ldr.w r0, [ip, #128] ; 0x80\n",
27 " 48: f8cd cffc str.w ip, [sp, #4092] ; 0xffc\n",
30 " 54: f8c5 c004 str.w ip, [r5, #4]\n",
32 " 5c: f04f 0cff mov.w ip, #255 ; 0xff\n",
33 " 60: f8cd c030 str.w ip, [sp, #48] ; 0x30\n",
34 " 64: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000\n",
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/art/runtime/arch/arm/
Dmemcmp16_arm.S59 ldrh ip, [r1], #2
60 subs r0, r0, ip
78 ldrh ip, [r1], #2
80 subs r0, r0, ip
101 ldr ip, [r1]
110 eors r0, r0, ip
112 ldreq ip, [r1, #4]!
116 eorseq r0, r0, ip
118 ldreq ip, [r1, #4]!
122 eorseq r0, r0, ip
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/art/runtime/interpreter/mterp/arm/
Dop_cmp_long.S15 sbcs ip, r1, r3 @ Sets correct CCs for checking LT (but not EQ/NE)
16 mov ip, #0
17 mvnlt ip, #0 @ -1
19 orrne ip, #1
21 SET_VREG ip, r9 @ vAA<- ip
22 GET_INST_OPCODE ip @ extract opcode from rINST
23 GOTO_OPCODE ip @ jump to next instruction
Dop_shr_long_2addr.S9 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
16 subs ip, r2, #32 @ ip<- r2 - 32
18 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
20 GET_INST_OPCODE ip @ extract opcode from rINST
22 GOTO_OPCODE ip @ jump to next instruction
Dop_ushr_long_2addr.S9 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
16 subs ip, r2, #32 @ ip<- r2 - 32
18 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
20 GET_INST_OPCODE ip @ extract opcode from rINST
22 GOTO_OPCODE ip @ jump to next instruction
Dop_shl_long_2addr.S9 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
16 subs ip, r2, #32 @ ip<- r2 - 32
18 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
20 GET_INST_OPCODE ip @ extract opcode from rINST
22 GOTO_OPCODE ip @ jump to next instruction
Dop_shr_long.S15 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
21 subs ip, r2, #32 @ ip<- r2 - 32
22 movpl r0, r1, asr ip @ if r2 >= 32, r0<-r1 >> (r2-32)
25 GET_INST_OPCODE ip @ extract opcode from rINST
27 GOTO_OPCODE ip @ jump to next instruction
Dop_shl_long.S15 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
21 subs ip, r2, #32 @ ip<- r2 - 32
22 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32)
25 GET_INST_OPCODE ip @ extract opcode from rINST
27 GOTO_OPCODE ip @ jump to next instruction
Dop_ushr_long.S15 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs
21 subs ip, r2, #32 @ ip<- r2 - 32
22 movpl r0, r1, lsr ip @ if r2 >= 32, r0<-r1 >>> (r2-32)
25 GET_INST_OPCODE ip @ extract opcode from rINST
27 GOTO_OPCODE ip @ jump to next instruction
Dop_mul_long_2addr.S16 mul ip, r2, r1 @ ip<- ZxW
18 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
22 GET_INST_OPCODE ip @ extract opcode from rINST
24 GOTO_OPCODE ip @ jump to next instruction
Dop_mul_long.S27 mul ip, r2, r1 @ ip<- ZxW
29 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
34 GET_INST_OPCODE ip @ extract opcode from rINST
36 GOTO_OPCODE ip @ jump to next instruction
Dop_const_4.S5 GET_INST_OPCODE ip @ ip<- opcode from rINST
7 GOTO_OPCODE ip @ execute next instruction
Dop_move.S8 GET_INST_OPCODE ip @ ip<- opcode from rINST
14 GOTO_OPCODE ip @ execute next instruction
DbinopWide2addr.S24 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
27 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero shadow regs
31 GET_INST_OPCODE ip @ extract opcode from rINST
33 GOTO_OPCODE ip @ jump to next instruction
Dop_move_result_wide.S6 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
9 GET_INST_OPCODE ip @ extract opcode from rINST
10 GOTO_OPCODE ip @ jump to next instruction
DfunopWider.S14 CLEAR_SHADOW_PAIR r9, ip, lr @ Zero shadow regs
15 GET_INST_OPCODE ip @ extract opcode from rINST
18 GOTO_OPCODE ip @ jump to next instruction
Dop_move_wide_16.S9 CLEAR_SHADOW_PAIR r2, r3, ip @ Zero out the shadow regs
11 GET_INST_OPCODE ip @ extract opcode from rINST
12 GOTO_OPCODE ip @ jump to next instruction
DbinopWide.S28 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
31 CLEAR_SHADOW_PAIR rINST, lr, ip @ Zero out the shadow regs
35 GET_INST_OPCODE ip @ extract opcode from rINST
37 GOTO_OPCODE ip @ jump to next instruction
Dop_move_wide_from16.S8 CLEAR_SHADOW_PAIR rINST, ip, lr @ Zero out the shadow regs
10 GET_INST_OPCODE ip @ extract opcode from rINST
12 GOTO_OPCODE ip @ jump to next instruction
/art/runtime/interpreter/mterp/out/
Dmterp_arm64.S115 #define ip x16 macro
425 GET_INST_OPCODE ip // extract opcode from wINST
426 GOTO_OPCODE ip // jump to next instruction
439 GET_INST_OPCODE ip // ip<- opcode from rINST
440 GOTO_OPCODE ip // execute it
452 GET_INST_OPCODE ip // ip<- opcode from wINST
458 GOTO_OPCODE ip // execute next instruction
470 GET_INST_OPCODE ip // extract opcode from wINST
476 GOTO_OPCODE ip // jump to next instruction
488 GET_INST_OPCODE ip // extract opcode from xINST
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/art/runtime/interpreter/mterp/arm64/
Dfooter.S106 GET_INST_OPCODE ip
107 GOTO_OPCODE ip
145 GET_INST_OPCODE ip // extract opcode from wINST
146 GOTO_OPCODE ip // jump to next instruction
154 GET_INST_OPCODE ip // extract opcode from wINST
155 GOTO_OPCODE ip // jump to next instruction
174 GET_INST_OPCODE ip // extract opcode from wINST
175 GOTO_OPCODE ip // jump to next instruction
207 GET_INST_OPCODE ip // extract opcode from wINST
208 GOTO_OPCODE ip // jump to next instruction
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Dop_nop.S2 GET_INST_OPCODE ip // ip<- opcode from rINST
3 GOTO_OPCODE ip // execute it
Dop_const_wide_16.S5 GET_INST_OPCODE ip // extract opcode from rINST
7 GOTO_OPCODE ip // jump to next instruction
Dop_const_16.S6 GET_INST_OPCODE ip // extract opcode from wINST
7 GOTO_OPCODE ip // jump to next instruction
/art/compiler/linker/arm/
Drelative_patcher_thumb2.cc190 __ Ldr(ip, lock_word); in EmitGrayCheckAndFastPath()
194 __ Tst(ip, Operand(LockWord::kReadBarrierStateMaskShifted)); in EmitGrayCheckAndFastPath()
200 __ Add(base_reg, base_reg, Operand(ip, LSR, 32)); in EmitGrayCheckAndFastPath()
209 using vixl::aarch32::ip; in LoadReadBarrierMarkIntrospectionEntrypoint()
217 DCHECK_EQ(ip.GetCode(), 12u); in LoadReadBarrierMarkIntrospectionEntrypoint()
219 Thread::ReadBarrierMarkEntryPointsOffset<kArmPointerSize>(ip.GetCode()); in LoadReadBarrierMarkIntrospectionEntrypoint()
239 temps.Exclude(ip); in CompileBakerReadBarrierThunk()
260 __ Ldrh(ip, ldr_half_address); // Load the LDR immediate half-word with "Rt | imm12". in CompileBakerReadBarrierThunk()
261 __ Ubfx(ip, ip, 0, 12); // Extract the offset imm12. in CompileBakerReadBarrierThunk()
262 __ Ldr(ip, MemOperand(base_reg, ip)); // Load the reference. in CompileBakerReadBarrierThunk()
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