Searched refs:hasDSP (Results 1 – 14 of 14) sorted by relevance
113 if (hasDSP()) in MipsSubtarget()
248 bool hasDSP() const { return HasDSP; } in hasDSP() function
24 def HasDSP : Predicate<"Subtarget->hasDSP()">,
47 if (Subtarget.hasDSP() || Subtarget.hasMSA()) { in MipsSETargetLowering()59 if (Subtarget.hasDSP()) { in MipsSETargetLowering()239 return Subtarget.hasDSP() ? &Mips::ACC64DSPRegClass : &Mips::ACC64RegClass; in getRepRegClassFor()858 if (!Subtarget.hasDSP()) in performDSPShiftCombine()
740 if (Subtarget->hasDSP()) // Select DSP instructions, ADDSC and ADDWC. in trySelect()
209 def NotDSP : Predicate<"!Subtarget->hasDSP()">;
154 if (P.hasDSP()) in setASESetFromPredicates()
474 bool hasDSP() const { return HasDSP; } in hasDSP() function
596 if (Subtarget->isMClass() && Subtarget->hasDSP()) in getArchForCPU()832 if (STI.hasDSP() && isV8M(&STI)) in emitAttributes()
3827 static inline int getMClassFlagsMask(StringRef Flags, bool hasDSP) { in getMClassFlagsMask() argument3829 return 0x2 | (int)hasDSP; in getMClassFlagsMask()3874 int Mask = getMClassFlagsMask(Flags, Subtarget->hasDSP()); in getMClassRegisterMask()3883 if (!Subtarget->hasDSP() && (Mask & 0x1)) in getMClassRegisterMask()
253 def HasDSP : Predicate<"Subtarget->hasDSP()">,
733 || (Subtarget->isThumb2() && !Subtarget->hasDSP())) in ARMTargetLowering()
290 bool hasDSP() const { in hasDSP() function in __anonef5d38c20111::ARMAsmParser4108 if (!hasDSP() && (FlagsVal & 0x400)) in parseMSRMaskOperand()
513 bool hasDSP() const { in hasDSP() function in __anond0efcad40211::MipsAsmParser