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Searched refs:F_UNBR (Results 1 – 6 of 6) sorted by relevance

/toolchain/binutils/binutils-2.27/opcodes/
Dsparc-opc.c750 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, 0, 0, v6 }, /* …
751 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI_RS2(~0), "1", F_UNBR|F_DELAYED, 0, 0, v6 }, /…
752 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "1+i", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett rs…
753 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "i+1", F_UNBR|F_DELAYED, 0, 0, v6 }, /* rett X+…
754 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0, "i", F_UNBR|F_DELAYED, 0, 0, v6 }, /* re…
755 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0, "i", F_UNBR|F_DELAYED, 0, 0, v6 }, /* re…
756 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|SIMM13(~0), "1", F_UNBR|F_DELAYED, 0, 0, v6 }, /*…
763 { "ret", F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8), "", F_UNBR|F_DEL…
764 { "retl", F3(2, 0x38, 1)|RS1(0x0f)|SIMM13(8), F3(~2, ~0x38, ~1)|RS1(~0x0f)|SIMM13(~8), "", F_UNBR|F…
1287 …tr(top, F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), ((flags) & ~(F_UNBR|F_CONDBR)…
[all …]
Dsparc-dis.c1057 if (opcode->flags & (F_UNBR|F_CONDBR|F_JSR)) in print_insn_sparc()
1061 if (opcode->flags & F_UNBR) in print_insn_sparc()
DChangeLog-92973397 * sparc-opc.c: Add F_JSR, F_UNBR, or F_CONDBR flags to each branch
/toolchain/binutils/binutils-2.27/include/opcode/
Dsparc.h119 #define F_UNBR 0x00000004 /* Unconditional branch. */ macro
DChangeLog-91032760 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
/toolchain/binutils/binutils-2.27/gas/config/
Dtc-sparc.c1585 && ((last_insn->flags & (F_UNBR | F_CONDBR | F_FBR)) == 0 in md_assemble()