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/toolchain/binutils/binutils-2.27/ld/testsuite/ld-mips-elf/
Dcompressed-plt-1-o32-umips-got.rd50 # A MIPS (as opposed to microMIPS) PLT should be used as the symbol value
51 # if and only if the function has a direct MIPS caller (du).
52 .*: 10100121 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
53 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
55 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
56 .*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
57 .*: 10100151 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
58 .*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
59 .*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
60 .*: 1010015d 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
[all …]
Dcompressed-plt-1-o32-mips16-got.rd51 # a direct MIPS16 caller (dc) and no direct MIPS caller (du).
52 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
53 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
55 .*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
56 .*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
57 .*: 10100191 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
58 .*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
59 .*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
60 .*: 101001a1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
61 .*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
[all …]
Dcompressed-plt-1-o32-mips16-word.rd66 # a direct MIPS16 caller (dc) and no direct MIPS caller (du).
67 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
68 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
70 .*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
71 .*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
72 .*: 10100191 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
73 .*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
74 .*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
75 .*: 101001a1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
76 .*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
[all …]
Dcompressed-plt-1-o32-umips-word.rd65 # A MIPS (as opposed to microMIPS) PLT should be used as the symbol value
66 # if and only if the function has a direct MIPS caller (du).
67 .*: 10100121 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
68 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
70 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
71 .*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
72 .*: 10100151 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
73 .*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
74 .*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
75 .*: 1010015d 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
[all …]
Dcompressed-plt-1-o32-umips.rd51 # A MIPS (as opposed to microMIPS) PLT should be used as the symbol value
52 # if and only if the function has a direct MIPS caller (du).
53 .*: 10100121 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
54 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
56 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
58 .*: 10100151 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
60 .*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
62 .*: 10100169 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
63 .*: 10100175 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
64 .*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
[all …]
Dcompressed-plt-1-o32-mips16.rd52 # a direct MIPS16 caller (dc) and no direct MIPS caller (du).
53 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
54 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
56 .*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
58 .*: 10100191 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
60 .*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
62 .*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
63 .*: 10100090 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
64 .*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
69 .*: 101001e1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
[all …]
Dcompressed-plt-1-n32-umips.rd50 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
51 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
53 .*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
55 .*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
57 .*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
59 .*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
60 .*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
61 .*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
66 .*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
68 .*: 10100130 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
[all …]
Dcompressed-plt-1-n32-mips16.rd50 .*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
51 .*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
53 .*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
55 .*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
57 .*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
59 .*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
60 .*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
61 .*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
66 .*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
68 .*: 10100130 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
[all …]
Dstub-dynsym-1.ld9 .MIPS.stubs : { *(.MIPS.stubs) }
16 /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) }
Dgot-dump-2.ld12 .MIPS.stubs : { *(.MIPS.stubs) }
19 /DISCARD/ : { *(.MIPS.abiflags) *(.gnu.attributes) }
Dpic-and-nonpic-3a.ld15 .MIPS.stubs : { *(.MIPS.stubs) }
24 /DISCARD/ : { *(.MIPS.abiflags) }
Dgot-dump-1.ld13 .MIPS.stubs : { *(.MIPS.stubs) }
20 /DISCARD/ : { *(.MIPS.abiflags) *(.gnu.attributes) }
Ddyn-sec64.ld17 .MIPS.stubs : { *(.MIPS.stubs) }
24 /DISCARD/ : { *(.MIPS.abiflags) *(.gnu.attributes) }
/toolchain/binutils/binutils-2.27/gas/doc/
Dc-mips.texi6 @node MIPS-Dependent
7 @chapter MIPS Dependent Features
11 @chapter MIPS Dependent Features
14 @cindex MIPS processor
15 @sc{gnu} @code{@value{AS}} for MIPS architectures supports several
16 different MIPS processors, and MIPS ISA levels I through V, MIPS32,
17 and MIPS64. For information about the MIPS instruction set, see
18 @cite{MIPS RISC Architecture}, by Kane and Heindrich (Prentice-Hall).
19 For an overview of MIPS assembly conventions, see ``Appendix D:
23 * MIPS Options:: Assembler options
[all …]
/toolchain/binutils/binutils-2.27/binutils/testsuite/binutils-all/
Dreadelf.s6 # On the normal MIPS systems, sections must be aligned to 16 byte
10 # MIPS targets put .rela.text here.
14 # MIPS targets put .reginfo, .mdebug, .MIPS.abiflags and .gnu.attributes here.
/toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/
Dattr-gnu-4-0.d3 #name: MIPS gnu_attribute 4,0
5 MIPS ABI Flags Version: 0
7 ISA: MIPS.*
Dmodule-msoft-float.d3 #name: MIPS module softfloat
9 MIPS ABI Flags Version: 0
11 ISA: MIPS.*
Dr5900.s31 # The c.lt.s instruction of R5900 has the same opcode as c.olt.s of MIPS I.
35 # The c.le.s instruction of R5900 has the same opcode as c.ole.s of MIPS I.
45 # The cvt.w.s instruction of the R5900 does the same as trunc.w.s in MIPS I.
46 # The cvt.w.s instruction of MIPS I doesn't exist in the R5900 CPU.
Dmodule-mfp32.d3 #name: MIPS module fp=32
9 MIPS ABI Flags Version: 0
11 ISA: MIPS.*
Dmodule-msingle-float.d3 #name: MIPS module singlefloat
9 MIPS ABI Flags Version: 0
11 ISA: MIPS.*
Dattr-none-double.d4 #name: MIPS infer fpabi (double-precision)
10 MIPS ABI Flags Version: 0
12 ISA: MIPS.*
Dattr-gnu-4-1.d4 #name: MIPS gnu_attribute 4,1 (double precision)
10 MIPS ABI Flags Version: 0
12 ISA: MIPS.*
Dattr-gnu-4-3.d5 #name: MIPS gnu_attribute 4,3 (-msoft-float)
11 MIPS ABI Flags Version: 0
13 ISA: MIPS.*
Dr5900-full.s35 # The c.lt.s instruction of R5900 has the same opcode as c.olt.s of MIPS I.
39 # The c.le.s instruction of R5900 has the same opcode as c.ole.s of MIPS I.
49 # The cvt.w.s instruction of the R5900 does the same as trunc.w.s in MIPS I.
50 # The cvt.w.s instruction of MIPS I doesn't exist in the R5900 CPU.
Dattr-gnu-abi-fp-1.d4 #name: MIPS gnu_attribute Tag_GNU_MIPS_ABI_FP,1
10 MIPS ABI Flags Version: 0
12 ISA: MIPS.*

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