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Searched refs:Rs (Results 1 – 14 of 14) sorted by relevance

/toolchain/binutils/binutils-2.27/cpu/
Dxstormy16.cpu208 (dnf f-Rs "general register source" () 8 4)
209 (dnop Rs "general register source" () h-gr f-Rs)
616 ("mov$ws2 $Rdm,($Rs)")
617 (+ OP1_7 OP2A_0 ws2 Rs OP4M_0 Rdm)
619 (set-psw Rdm (index-of Rdm) (alignfix-mem Rs) ws2)
620 (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2))
627 ("mov$ws2 $Rdm,($Rs++)")
628 (+ OP1_6 OP2A_0 ws2 Rs OP4M_0 Rdm)
631 (set-psw Rdm (index-of Rdm) (alignfix-mem Rs) ws2)
632 (set-psw Rdm (index-of Rdm) (and #xFF (mem QI Rs)) ws2))
[all …]
Dcris.cpu254 ((Rs INT -1))
262 ((Rs INT -1) (Rd INT -1))
265 ((Rs INT -1) (Rd INT -1))
268 ((Rs INT -1) (Rd INT -1))
274 ((Rs INT -1))
292 ((Rd INT -1) (Rs INT -1))
299 ((Rs INT -1))
306 ((Rs INT -1))
1537 ; Rs := source operand, register addressing mode
1538 (dnop Rs "Source general register" () h-gr f-source)
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Diq2000.cpu144 (dnf f-rs "register field Rs" () 25 5)
156 (comment "register Rd implied from Rs")
186 (comment "register Rt implied from Rs")
361 (dnop rs "register Rs" () h-gr f-rs)
364 (dnop rd-rs "register Rd from Rs" () h-gr f-rd-rs)
366 (dnop rt-rs "register Rt from Rs" () h-gr f-rt-rs)
Dfr30.cpu152 (dnf f-Rs1 "register Rs" () 8 4)
153 (dnf f-Rs2 "register Rs" () 12 4)
1195 "st Rs,@-R15 reg/mem"
1241 "mov Ri,Rs reg/reg"
/toolchain/binutils/binutils-2.27/opcodes/
Daarch64-tbl.h2351 …CORE_INSN ("stxrb", 0x8007c00, 0xffe08000, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0),
2352 …CORE_INSN ("stlxrb", 0x800fc00, 0xffe08000, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0…
2357 …CORE_INSN ("stxrh", 0x48007c00, 0xffe08000, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0…
2358 …CORE_INSN ("stlxrh", 0x4800fc00, 0xffe08000, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, …
2363 …CORE_INSN ("stxr", 0x88007c00, 0xbfe08000, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2_LDST_EXC, F_…
2364 …CORE_INSN ("stlxr", 0x8800fc00, 0xbfe08000, ldstexcl, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2_LDST_EXC, F…
2365 …CORE_INSN ("stxp", 0x88200000, 0xbfe08000, ldstexcl, OP4 (Rs, Rt, Rt2, ADDR_SIMPLE), QL_R3_LDST_EX…
2366 …CORE_INSN ("stlxp", 0x88208000, 0xbfe08000, ldstexcl, OP4 (Rs, Rt, Rt2, ADDR_SIMPLE), QL_R3_LDST_E…
2424 …_LSE_INSN ("casb", 0x8a07c00, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0…
2425 …_LSE_INSN ("cash", 0x48a07c00, 0xffe0fc00, lse_atomic, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, …
[all …]
/toolchain/binutils/binutils-2.27/gas/config/
Dtc-arm.c10457 int Rd, Rs, Rn; in do_t_add_sub() local
10460 Rs = (inst.operands[1].present in do_t_add_sub()
10483 constraint (Rd == REG_SP && Rs != REG_SP, BAD_SP); in do_t_add_sub()
10492 if (Rd == REG_SP && Rs == REG_SP && !flags) in do_t_add_sub()
10494 else if (Rd <= 7 && Rs == REG_SP && add && !flags) in do_t_add_sub()
10496 else if (Rd <= 7 && Rs == REG_PC && add && !flags) in do_t_add_sub()
10498 else if (Rd <= 7 && Rs <= 7 && narrow) in do_t_add_sub()
10508 inst.instruction |= (Rd << 4) | Rs; in do_t_add_sub()
10530 constraint (Rs != REG_LR || inst.instruction != T_MNEM_subs, in do_t_add_sub()
10542 else if (Rs == REG_PC) in do_t_add_sub()
[all …]
/toolchain/binutils/binutils-2.27/gas/doc/
Dc-h8300.texi209 Rs @r{source register}
/toolchain/benchmark/panorama_input/
Dtest_008.ppm6253 3QRs"KlOoJk
6274 Oq?bRs<]�;]�_�[{e�Df�:[�Lla�(^}#XwCb ;Z8XCb ?^
6441 …v�������ҠesAJhKiX]�"^�%f�-k�5k�5q�?^�,QtX{ f�*e�)QsKmKiB`B_DaDeRs(_5[|1Jn"Y}1Ki#Lk%Ml…
6975 …#Ip'Ox1Is,Hq*Is,Ov/Fn'Fn)Fn)Ks.Jq-Rz5Qx4Mu0Qx4T|7W~:gkHuxVqzTv~Yt�X�dhzKo�Rs�Vo�Rh�Mq�WVw<Km1Rx8W…
6991 DpMw#Bl>hMw"Q}(a�8Ow'Mv&R{*FoQw(ElJkXx,IhVu(Qp#Yx,Wx(KmXx,Rs&Ss(Tt)f�?_{8Ld']t7d{Ag~DZu:Yt8…
7709 …���������������������Ê��ZmD`sJhCg~Bi�;g8n�>o�?g�8d}5[{0Ll!<[8X8YBb=^Rs)Xw1b�<a�=Yx5Ss/Dd Cb…
8069 &?-I6R"<]&>_(Rs<6W -I3O>Z(5Q3O-I.J:V#0M(E.J1MB^.Ea1Mi:Ok;;W':V&7W&/O1Q 3R!0P3RAa)1R…
8075 …Eg,Hi.Fh*Km/Df*Mo4Fi1Dg/Lo6Sv=Mq3Rv7Os4X|=Qt;>a(Eh0Fi1Ik6_�Lb�LEf/Jk3Hh0>_(Rs<St=:Z#Rn7Rn7:V5QMi…
8121 7W;Z;ZTt0Ba8[Sv/Rs(Kl!Cb3RB_Sp'Fd>[=VYq.Wo,Ph%Qi&k�?Xw.Zz0^}3Vu*V{)X},Qw*Ou(Z}6[~7_~8`:…
8222 …;XEb#If'A^!:W>Y Lg.?Y#;TIg-Pn4B`#:XHi,Su7Rv7Dh)5Z >d)3V.Q8["Lo6WwAPp:Rs<Tu>Fb0Kg5Fi1?b*Ik8Df…
[all …]
Dtest_011.ppm6602 …^/e�6_�0e�3i�7f�6h�8a�1a�1Yz)Z{*a�0`�/^~-]},b�0i�7f�3d�0Z{)_.Wx([}-Y{)Pq RsVv"MnYz&d�.e�/[~%Z}…
6616 …l�?o�Cp�Dl�?o�?n�>g�8l�=s�Cq�Bs�?o�<o�?p�Ah�8h�8q�D|�Op�Ck�=e�7`3Z{*Pp Xx'Rs![}&e�/_�)Wx!HiMoPu…
6882 …Io"Ls#T{,f�:a�5i�:q�Bm�?m�?f�=_�6^�8d�>`�:_�8g�=h�>i�=b�6f�:o�Ct�Ho�Ca�5d�7Rs&Vv)Z�1V|-Y0_�6W~,Mu…
7069 …�`��o��p��������}��v��]��d��]��T��Q��M��t����Ɩ�Ϟ������׽�ɯ���S��K��S��aĺ���~Rs)Fg>h4^ :d8b4[ 6^…
7441 …��k��n��X��L��A��H��WƧb��xĩѶ�ͳ�Ү|԰~ٲkӬeŤO��C��]׹|��t��Q��`��mũnʮs�ͬ�׵��Z�{P��R��`�Rs]/^`-8;,C 0H
7865 …0g�;}�T��Z{�Vp�Kx�Ql�Dg�?g�?X{4Ps,Ms-Sx3Tw0_�;Y|5_�;h�Dd�?l�Eo�In�ERs)m�Db�:Rs)b�:Qp-[{7Xv7:X1O"?
7947 …:*E:T)Ea4Fb5Ea4RnA]|IPo<WxDSuAHi5Jl7Cd,>_'Rs;Vv>Sz<Hn0Hl-Dh)Ab'Eg,Kl4Fg/?`(Fg/Qt;Dg.Fg/Mn6Rt8Ik/…
8158 …/R 6Y>a1T.PAb";]Xz<Km/>`"6X5W;];]5S>] "?.K;X;X:XA_ 8ZEg,Cd,Rs;Ro8Eb,">8TKg1^zDWq…
8163 !<4 /6 ,HA]-D`0Ea1Ih7Cb1Ik6Fh45Z!Jo6?b*;^&6Y!1TSt=Ii3Ad*Fi0Mq5Hl/Rs;[|D_wKWoC-<)&…
8467 .Q)L,P,P/R0S%I 3W;_"7[.P1SRs;7X ^~He�ODg/Dg/e�PTw?]~JXzE]~JKm8?a/8Z([}MIk;Qs>Km8Ln<QsA=_-…
[all …]
Dtest_003.ppm6412 BaBa=]MmWv?` :ZIiRs!Ii.O�)I�.M7XSt#/O.M/L
6614 QX<xqiaZR^L?`OBdQJiWP]k:_m<Rs"Rs"SsTtRt"Su#Mq#Sw)W{-Vz,Z{*]}-b4Xu)Xu-d�8f�A`~;A]:V:T5PJa)=T…
7168 …_�5W�-Lx%FsP|'Lx#O{&Q}(Kw"O{&P|'Y�0CoBnKw"P|'Mw"V*[�0Ov#Ox!S}&EkEkTu#Rs!Xx'Ww&[x0Yv._{;_{;k�…
7861 /M!6T(&D< >?>'E(F5S'A_3SsBa�Pg�QPp:Fg/Rs;Eg,;]!5W*L.T;a!3YT{;;a!8_<b =d!:a6^Io/Kq1…
8261 )C4M%;W)/K0P-L&I#F#F!D )I,K5QD`.Bb*XxARs;Rs;Qs7=_#;^&(K-O/Q8Z&.P>a)Cf.Eh/0S5XAd*Dg/…
8638 …RpDYxHJi8Cb1TtCa�O;](>`,>`,Ko:VzDIp7Pw>Bh3Ci4?d.Hl6Hi5Bd/Ih5^}J]|IVuBa�KBb,Rs<`�JRn<i�STq<Ol67TKh…
8852 85R;^%?b)(L)M,O<*MSv>Cf.-PCg*8] :^!Ko3:]#3VMp7[~EJm45X^�I:]%0SRu=Ru=Jm5Eh/Jm4St=Rs<e�Q…
8940 <^)/Q;_";_"7['K1T6Y ;^%Mp7?b)<_&5X*M8[#4W:]%Dg/Hk3Cf./P(IQq;Rs<Hh0Lm5d�MKl50P-L6V")ICd-…
9152 …SDe<Cd;Hh?Aa8LkCWuMQoEQoEi�[n�`~�pZxLf�Te�S`�K^�IZ~Id�R_�L[}IMo;Ik6W{>]�Dn�Rs�Wh�Lh�Lg�Ob�JV{AY~DX…
9278 .�;!B )J/P5T!Dd0Vv?Rs<<]&Fg0Bd/Ik6/Qi�WHi56X#3T 0RAb.<^):[',M8Z&(JMq<t�bd�TIo:Eg5-O<^,=_->…
[all …]
/toolchain/binutils/binutils-2.27/include/opcode/
DChangeLog-0415839 and mov.b/w/l Rs,@(d:32,ERd).
/toolchain/binutils/binutils-2.27/gas/
DChangeLog-20072551 * config/tc-arm.c (do_t_add_sub): Use Rd and Rs.
/toolchain/binutils/binutils-2.27/gas/po/
Dtr.po15064 #~ msgid "Rs and Rd must be different in MUL"
15065 #~ msgstr "MUL içinde Rs ve Rd farklı olmalı"
Des.po18574 #~ msgid "Rs and Rd must be different in MUL"
18575 #~ msgstr "Rs y Rd deben ser diferentes en MUL"