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Searched refs:SIMM24 (Results 1 – 3 of 3) sorted by relevance

/toolchain/binutils/binutils-2.27/opcodes/
Depiphany-opc.c229 { { MNEM, ' ', OP (SIMM24), 0 } },
241 { { MNEM, ' ', OP (SIMM24), 0 } },
253 { { MNEM, ' ', OP (SIMM24), 0 } },
265 { { MNEM, ' ', OP (SIMM24), 0 } },
277 { { MNEM, ' ', OP (SIMM24), 0 } },
289 { { MNEM, ' ', OP (SIMM24), 0 } },
301 { { MNEM, ' ', OP (SIMM24), 0 } },
313 { { MNEM, ' ', OP (SIMM24), 0 } },
325 { { MNEM, ' ', OP (SIMM24), 0 } },
337 { { MNEM, ' ', OP (SIMM24), 0 } },
[all …]
Dm10300-opc.c305 #define SIMM24 (IMM24+1) macro
310 #define IMM24_MEM (SIMM24+1)
565 { "mov", 0xfd080000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
592 { "mac", 0xfd0b0000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
602 { "macb", 0xfd2b0000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
612 { "mach", 0xfd4b0000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
780 { "add", 0xfd780000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
787 { "addc", 0xfd880000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
799 { "sub", 0xfd980000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
806 { "subc", 0xfda80000, 0xffff0000, 0, FMT_D8, AM33, {SIMM24, RN02}},
[all …]
/toolchain/binutils/binutils-2.27/cpu/
Depiphany.cpu1099 ;; B<COND> SIMM24