| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| D | ldst-reg-pair.s | 44 .macro op3 op, reg, size, type macro
64 op3 stp, w, 4, \type
65 op3 ldp, w, 4, \type
67 op3 ldpsw, x, 4, \type
69 op3 stp, x, 8, \type
70 op3 ldp, x, 8, \type
72 op3 stp, s, 4, \type
73 op3 ldp, s, 4, \type
75 op3 stp, d, 8, \type
76 op3 ldp, d, 8, \type
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| D | ldst-reg-reg-offset.s | 42 .macro op3 op, reg, ext, imm=-1 macro
64 op3 \op, b, \ext
65 op3 \op, b, \ext, 0
66 op3 \op, h, \ext, 0
67 op3 \op, h, \ext, 1
68 op3 \op, s, \ext, 0
69 op3 \op, s, \ext, 2
70 op3 \op, d, \ext, 0
71 op3 \op, d, \ext, 3
72 op3 \op, q, \ext, 0
[all …]
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| /toolchain/binutils/binutils-2.27/bfd/ |
| D | elf32-h8300.c | 1227 unsigned char op0, op1, op2, op3; in elf32_h8_relax_section() local
1281 op3 = bfd_get_8 (abfd, op_ptr + 3); in elf32_h8_relax_section()
1286 && (op3 & 0x80) == 0x80) in elf32_h8_relax_section()
1293 op3 &= ~0x08; in elf32_h8_relax_section()
1294 bfd_put_8 (abfd, op3, op_ptr + 3); in elf32_h8_relax_section()
1371 unsigned char op0, op1, op2, op3, op0n, op1n; in elf32_h8_relax_section() local
1385 op3 = bfd_get_8 (abfd, contents + irel->r_offset - 1); in elf32_h8_relax_section()
1392 if ((op1 & 0x8F) == 0x00 && (op3 & 0x70) == 0x20) in elf32_h8_relax_section()
1400 if ((op1 & 0x0F) == 0x00 && (op3 & 0x70) == 0x20) in elf32_h8_relax_section()
1415 op1n = (op3 & 0x8F) | (op1 & 0x70); in elf32_h8_relax_section()
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| /toolchain/binutils/binutils-2.27/gold/ |
| D | i386.cc | 3337 unsigned char op3 = view[4]; in tls_gd_to_le() local
3342 op3 == 0xe8 || op3 == 0xff); in tls_gd_to_le()
3361 && (op3 == 0xe8 || (view[5] & 0x7) == reg))); in tls_gd_to_le()
3362 if (op3 == 0xff in tls_gd_to_le()
3410 unsigned char op3 = view[4]; in tls_gd_to_ie() local
3415 op3 == 0xe8 || op3 == 0xff); in tls_gd_to_ie()
3435 && ((op3 == 0xe8 && view[9] == 0x90) in tls_gd_to_ie()
3546 unsigned char op3 = view[4]; in tls_ld_to_le() local
3549 op3 == 0xe8 || op3 == 0xff); in tls_ld_to_le()
3551 op3 == 0xe8 ? 9 : 10); in tls_ld_to_le()
[all …]
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| D | sparc.cc | 4101 uint32_t op3, reg, off; in relax_call() local
4154 op3 = (delay_insn >> 19) & 0x3f; in relax_call()
4156 if (op3 != 0x3d in relax_call()
4157 && ((op3 & 0x28) != 0 || reg != 15)) in relax_call()
4162 if (op3 != 0x3d) in relax_call()
4211 if (op3 == 0x02 in relax_call()
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| D | x86_64.cc | 4616 unsigned char op3 = view[-1]; in tls_ie_to_le() local
4617 unsigned char reg = op3 >> 3; in tls_ie_to_le()
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| /toolchain/binutils/binutils-2.27/include/opcode/ |
| D | m88k.h | 441 OPSPEC op1,op2,op3; member
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| /toolchain/binutils/binutils-2.27/cpu/ |
| D | ip2k.cpu | 123 (dnf f-op3 "op3" () 15 3)
183 ; insn-op3: bits 15-13
184 (define-normal-insn-enum insn-op3 "op3 enums" () OP3_ f-op3
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| D | m32r.cpu | 490 (dnf f-op3 "op3" () 14 2)
1756 (+ OP1_5 dr OP2_15 accs (f-op3 0))
1773 (+ OP1_5 dr OP2_15 accs (f-op3 1))
1790 (+ OP1_5 dr OP2_15 accs (f-op3 2))
1818 (+ OP1_5 src1 OP2_7 accs (f-op3 0))
1841 (+ OP1_5 src1 OP2_7 accs (f-op3 1))
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| D | fr30.cpu | 145 (dnf f-op3 "3rd 4 bits of opcode" () 8 4)
249 ; insn-op3: bits 8-11
251 (define-normal-insn-enum insn-op3 "insn op3 enums" () OP3_ f-op3
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| D | xstormy16.cpu | 237 (dnf f-op3 "opcode" () 8 4)
238 (define-normal-insn-enum insn-op3 "insn op enums" () OP3_ f-op3
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| D | xc16x.cpu | 2397 (define-pmacro (sysctrl name insn opc1 opc2 op1 op2 op3)
2402 (+ opc1 opc2 (f-op-lbit4 op1) (f-op-bit4 op2) (f-data8 op3) (f-op-bit8 op3))
2897 ;BFLDL op1,op2,op3
2915 ;BFLDH op1,op2,op3
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| /toolchain/binutils/binutils-2.27/opcodes/ |
| D | sparc-opc.c | 214 #define COMMUTEOP(opcode, op3, arch_mask) \ argument
215 { opcode, F3(2, op3, 0), F3(~2, ~op3, ~0)|ASI(~0), "1,2,d", 0, 0, 0, arch_mask }, \
216 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "1,i,d", 0, 0, 0, arch_mask }, \
217 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1), "i,1,d", 0, 0, 0, arch_mask }
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| D | m88k-dis.c | 737 printop (info, &(entry_ptr->instr->op3), instruction, pc, 0); in m88kdis()
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| D | ChangeLog-9297 | 313 * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq.
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