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Searched refs:relaxable (Results 1 – 25 of 43) sorted by relevance

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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/m32r/
Dm32rx.s141 # Use bc.s here as bc is relaxable and thus a nop will be emitted.
150 # Use bcl.s here as bcl is relaxable and thus the parallelization won't happen.
165 # Use bnc.s here as bnc is relaxable and thus the parallelization attempt won't
182 # Use bra.s here as bra is relaxable and thus the parallelization won't happen.
/toolchain/binutils/binutils-2.27/ld/testsuite/ld-avr/
Drelax-elf-flags-08.d1 #name: AVR, check link-relax flag is clear final link (both inputs relaxable)
Drelax-elf-flags-07.d1 #name: AVR, check link-relax flag is set final link (both inputs relaxable)
Drelax-elf-flags-06.d1 #name: AVR, check link-relax flag is set final link (first input relaxable)
Drelax-elf-flags-05.d1 #name: AVR, check link-relax flag is set final link (no inputs relaxable)
/toolchain/binutils/binutils-2.27/gas/config/
Dtc-mn10200.c880 int next_opindex, relaxable; in md_assemble() local
913 relaxable = 0; in md_assemble()
942 relaxable = 1; in md_assemble()
1158 if (relaxable && fc > 0) in md_assemble()
Dtc-mn10300.c1237 int next_opindex, relaxable; in md_assemble() local
1275 relaxable = 0; in md_assemble()
1311 relaxable = 1; in md_assemble()
1862 if (relaxable && fc > 0) in md_assemble()
Dtc-m32c.c56 #define relaxable(_insn) (CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE (&((_insn).insn->base->attrs))) macro
376 && !relaxable (insn)) in md_assemble()
Dtc-v850.c2300 int relaxable = 0; in md_assemble() local
2369 relaxable = 0; in md_assemble()
2418 relaxable = 1; in md_assemble()
3069 if (relaxable && fc > 0) in md_assemble()
/toolchain/binutils/binutils-2.27/ld/testsuite/ld-m68hc11/
Drelax-group.s49 ;;; This group has the first two bset insn relaxable while the
/toolchain/binutils/binutils-2.27/cpu/
Dm32r.cpu893 (dnmi bc8r "relaxable bc8"
909 (dnmi bc24r "relaxable bc24"
955 (dnmi bl8r "relaxable bl8"
973 (dnmi bl24r "relaxable bl24"
993 (dnmi bcl8r "relaxable bcl8"
1011 (dnmi bcl24r "relaxable bcl24"
1027 (dnmi bnc8r "relaxable bnc8"
1043 (dnmi bnc24r "relaxable bnc24"
1069 (dnmi bra8r "relaxable bra8"
1085 (dnmi bra24r "relaxable bra24"
[all …]
Depiphany.cpu1115 (dnmi (.sym "b" name "16r") "relaxable conditional branch"
1132 (dnmi (.sym "b" name "32r") "relaxable conditional branch"
1168 (dnmi b16r "relaxable b16"
1181 (dnmi b32r "relaxable b"
1198 (dnmi bl16r "bl16 relaxable"
1213 (dnmi blr "bl relaxable"
2247 (dnmi addir "relaxable short immediate add" (RELAXABLE IMM3)
2255 ;; Again, but not relaxable so that full sized registers are handled
2261 (dnmi subir "relaxable short immediate sub" (RELAXABLE IMM3)
2469 (dnmi mov8r "mov imm8 relaxable"
[all …]
DChangeLog264 (arith-jnz-imm4-dst-defn): Make relaxable.
/toolchain/binutils/binutils-2.27/gas/
DChangeLog-2004390 cases. Check for weak symbols and assume not relaxable. Handle
2504 alternative of a relaxable macro. Remove redundant check for
2508 second version of a relaxable macro. Record the first relaxable
2514 when generating the second version of a relaxable macro.
2519 version of a relaxable macro is needed. Return -RELAX_SECOND if the
2522 (md_convert_frag): Go through the fixups for a relaxable macro and
DChangeLog-2015187 * config/rl78-parse.y: Make all branches relaxable via
189 * config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable
DChangeLog-96972108 (md_assemble): Handle relaxable operands/instructions correctly.
2675 fit into the constant field of a relaxable operand, then it does
2782 (md_assemble): Handle relaxable operands/instructions correctly.
3469 * config/tc-v850.c (md_assemble): Don't lose for relaxable
3484 (md_assemble): Note if the matching instruction has a relaxable
DChangeLog-00012437 as relaxable if embedded system, make weak syms non-relaxable.
2485 before a relaxable insns.
2535 (md_estimate_size_before_relax): Handle non-relaxable cases
2536 separately from relaxable cases for clarity, and return correct
DChangeLog-2013914 for the relaxable field. Use a relax_char variable to track the
DChangeLog-98992244 * config/tc-m32r.c (md_assemble): Emit a NOP after a relaxable 16
3573 symbols are relaxable.
DChangeLog-20062457 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
DChangeLog-20071920 * config/tc-m32c.c (rl_for, relaxable): Protect argument.
DChangeLog-20091716 32 bits for relaxable branches so that we can relax them later.
/toolchain/binutils/binutils-2.27/gas/doc/
Dinternals.texi1812 If you generate frags separately for the basic insn opcode and any relaxable
1814 opcode field from the relaxable frag. It is not guaranteed to be the same frag.
1816 relaxable frag, then you need to generate a common frag for both the basic
1817 opcode and relaxable fields, or you need to provide the frag for the opcode to
/toolchain/binutils/binutils-2.27/gas/testsuite/
DChangeLog-2005442 * gas/arm/thumb32.s: Tweak for better coverage of relaxable
/toolchain/binutils/binutils-2.27/opcodes/
DChangeLog-9297741 as relaxable.
921 branches relaxable.

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