1 /*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "context_mips64.h"
18
19 #include "base/bit_utils.h"
20 #include "base/bit_utils_iterator.h"
21 #include "quick/quick_method_frame_info.h"
22
23 namespace art {
24 namespace mips64 {
25
26 static constexpr uintptr_t gZero = 0;
27
Reset()28 void Mips64Context::Reset() {
29 std::fill_n(gprs_, arraysize(gprs_), nullptr);
30 std::fill_n(fprs_, arraysize(fprs_), nullptr);
31 gprs_[SP] = &sp_;
32 gprs_[T9] = &t9_;
33 gprs_[A0] = &arg0_;
34 // Initialize registers with easy to spot debug values.
35 sp_ = Mips64Context::kBadGprBase + SP;
36 t9_ = Mips64Context::kBadGprBase + T9;
37 arg0_ = 0;
38 }
39
FillCalleeSaves(uint8_t * frame,const QuickMethodFrameInfo & frame_info)40 void Mips64Context::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) {
41 int spill_pos = 0;
42
43 // Core registers come first, from the highest down to the lowest.
44 for (uint32_t core_reg : HighToLowBits(frame_info.CoreSpillMask())) {
45 gprs_[core_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes());
46 ++spill_pos;
47 }
48 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()));
49
50 // FP registers come second, from the highest down to the lowest.
51 for (uint32_t fp_reg : HighToLowBits(frame_info.FpSpillMask())) {
52 fprs_[fp_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes());
53 ++spill_pos;
54 }
55 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask()));
56 }
57
SetGPR(uint32_t reg,uintptr_t value)58 void Mips64Context::SetGPR(uint32_t reg, uintptr_t value) {
59 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfGpuRegisters));
60 DCHECK(IsAccessibleGPR(reg));
61 CHECK_NE(gprs_[reg], &gZero); // Can't overwrite this static value since they are never reset.
62 *gprs_[reg] = value;
63 }
64
SetFPR(uint32_t reg,uintptr_t value)65 void Mips64Context::SetFPR(uint32_t reg, uintptr_t value) {
66 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFpuRegisters));
67 DCHECK(IsAccessibleFPR(reg));
68 CHECK_NE(fprs_[reg], &gZero); // Can't overwrite this static value since they are never reset.
69 *fprs_[reg] = value;
70 }
71
SmashCallerSaves()72 void Mips64Context::SmashCallerSaves() {
73 // This needs to be 0 because we want a null/zero return value.
74 gprs_[V0] = const_cast<uintptr_t*>(&gZero);
75 gprs_[V1] = const_cast<uintptr_t*>(&gZero);
76 gprs_[A1] = nullptr;
77 gprs_[A0] = nullptr;
78 gprs_[A2] = nullptr;
79 gprs_[A3] = nullptr;
80 gprs_[A4] = nullptr;
81 gprs_[A5] = nullptr;
82 gprs_[A6] = nullptr;
83 gprs_[A7] = nullptr;
84
85 // f0-f23 are caller-saved; f24-f31 are callee-saved.
86 fprs_[F0] = nullptr;
87 fprs_[F1] = nullptr;
88 fprs_[F2] = nullptr;
89 fprs_[F3] = nullptr;
90 fprs_[F4] = nullptr;
91 fprs_[F5] = nullptr;
92 fprs_[F6] = nullptr;
93 fprs_[F7] = nullptr;
94 fprs_[F8] = nullptr;
95 fprs_[F9] = nullptr;
96 fprs_[F10] = nullptr;
97 fprs_[F11] = nullptr;
98 fprs_[F12] = nullptr;
99 fprs_[F13] = nullptr;
100 fprs_[F14] = nullptr;
101 fprs_[F15] = nullptr;
102 fprs_[F16] = nullptr;
103 fprs_[F17] = nullptr;
104 fprs_[F18] = nullptr;
105 fprs_[F19] = nullptr;
106 fprs_[F20] = nullptr;
107 fprs_[F21] = nullptr;
108 fprs_[F22] = nullptr;
109 fprs_[F23] = nullptr;
110 }
111
112 extern "C" NO_RETURN void art_quick_do_long_jump(uintptr_t*, uintptr_t*);
113
DoLongJump()114 void Mips64Context::DoLongJump() {
115 uintptr_t gprs[kNumberOfGpuRegisters];
116 uintptr_t fprs[kNumberOfFpuRegisters];
117 for (size_t i = 0; i < kNumberOfGpuRegisters; ++i) {
118 gprs[i] = gprs_[i] != nullptr ? *gprs_[i] : Mips64Context::kBadGprBase + i;
119 }
120 for (size_t i = 0; i < kNumberOfFpuRegisters; ++i) {
121 fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : Mips64Context::kBadFprBase + i;
122 }
123 art_quick_do_long_jump(gprs, fprs);
124 }
125
126 } // namespace mips64
127 } // namespace art
128