1%default {"result":"%eax","tmp":"%ecx"}
2/*
3 * Generic 32-bit binary operation in which both operands loaded to
4 * registers (op0 in eax, op1 in ecx).
5 */
6    /* binop vAA, vBB, vCC */
7    movzbl  2(rPC),%eax                     # eax <- BB
8    movzbl  3(rPC),%ecx                     # ecx <- CC
9    GET_VREG %eax, %eax                     # eax <- vBB
10    GET_VREG %ecx, %ecx                     # eax <- vBB
11    $instr                                  # ex: addl    %ecx,%eax
12    SET_VREG $result, rINST
13    ADVANCE_PC_FETCH_AND_GOTO_NEXT 2
14