1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG 5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -O1 -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=CLEANUP 6 // REQUIRES: x86-registered-target 7 // expected-no-diagnostics 8 #ifndef HEADER 9 #define HEADER 10 11 // CHECK-DAG: [[IDENT_T_TY:%.+]] = type { i32, i32, i32, i32, i8* } 12 13 // CHECK-LABEL: with_var_schedule 14 void with_var_schedule() { 15 double a = 5; 16 // CHECK: [[CHUNK_SIZE:%.+]] = fptosi double %{{.+}}to i8 17 // CHECK: store i8 %{{.+}}, i8* [[CHUNK:%.+]], 18 // CHECK: call void {{.+}} @__kmpc_fork_call({{.+}}, i8* [[CHUNK]]) 19 20 // CHECK: [[CHUNK:%.+]] = load i8*, i8** % 21 // CHECK: [[CHUNK_VAL:%.+]] = load i8, i8* [[CHUNK]], 22 // CHECK: [[CHUNK_SIZE:%.+]] = sext i8 [[CHUNK_VAL]] to i64 23 // CHECK: call void @__kmpc_for_static_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC:@[^,]+]], i32 [[GTID:%[^,]+]], i32 33, i32* [[IS_LAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]], i64 1, i64 [[CHUNK_SIZE]]) 24 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 25 #pragma omp parallel for schedule(static, char(a)) 26 for (unsigned long long i = 1; i < 2; ++i) { 27 } 28 } 29 30 // CHECK-LABEL: define {{.*void}} @{{.*}}without_schedule_clause{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 31 void without_schedule_clause(float *a, float *b, float *c, float *d) { 32 #pragma omp parallel for 33 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 34 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 35 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 36 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 37 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 38 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 39 // UB = min(UB, GlobalUB) 40 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 41 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 42 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 43 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 44 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 45 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 46 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 47 // Loop header 48 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 49 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 50 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 51 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 52 for (int i = 33; i < 32000000; i += 7) { 53 // CHECK: [[LOOP1_BODY]] 54 // Start of body: calculate i from IV: 55 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 56 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 57 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 33, [[CALC_I_1]] 58 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 59 // ... loop body ... 60 // End of body: store into a[i]: 61 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 62 a[i] = b[i] * c[i] * d[i]; 63 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 64 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 65 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 66 // CHECK-NEXT: br label %{{.+}} 67 } 68 // CHECK: [[LOOP1_END]] 69 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 70 // CHECK: ret void 71 } 72 73 // CHECK-LABEL: define {{.*void}} @{{.*}}static_not_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 74 void static_not_chunked(float *a, float *b, float *c, float *d) { 75 #pragma omp parallel for schedule(static) 76 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 77 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 78 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 79 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 80 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 81 // CHECK: call void @__kmpc_for_static_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 34, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 1) 82 // UB = min(UB, GlobalUB) 83 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 84 // CHECK-NEXT: [[UBCMP:%.+]] = icmp sgt i32 [[UB]], 4571423 85 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 86 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 4571423, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 87 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 88 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 89 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 90 // Loop header 91 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 92 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 93 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 94 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 95 for (int i = 32000000; i > 33; i += -7) { 96 // CHECK: [[LOOP1_BODY]] 97 // Start of body: calculate i from IV: 98 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 99 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 7 100 // CHECK-NEXT: [[CALC_I_2:%.+]] = sub nsw i32 32000000, [[CALC_I_1]] 101 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 102 // ... loop body ... 103 // End of body: store into a[i]: 104 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 105 a[i] = b[i] * c[i] * d[i]; 106 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 107 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 108 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 109 // CHECK-NEXT: br label %{{.+}} 110 } 111 // CHECK: [[LOOP1_END]] 112 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 113 // CHECK: ret void 114 } 115 116 // CHECK-LABEL: define {{.*void}} @{{.*}}static_chunked{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 117 void static_chunked(float *a, float *b, float *c, float *d) { 118 #pragma omp parallel for schedule(static, 5) 119 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 120 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 121 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 122 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 123 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 124 // CHECK: call void @__kmpc_for_static_init_4u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 33, i32* [[IS_LAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]], i32 1, i32 5) 125 // UB = min(UB, GlobalUB) 126 // CHECK: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 127 // CHECK-NEXT: [[UBCMP:%.+]] = icmp ugt i32 [[UB]], 16908288 128 // CHECK-NEXT: br i1 [[UBCMP]], label [[UB_TRUE:%[^,]+]], label [[UB_FALSE:%[^,]+]] 129 // CHECK: [[UBRESULT:%.+]] = phi i32 [ 16908288, [[UB_TRUE]] ], [ [[UBVAL:%[^,]+]], [[UB_FALSE]] ] 130 // CHECK-NEXT: store i32 [[UBRESULT]], i32* [[OMP_UB]] 131 // CHECK-NEXT: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 132 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 133 134 // Outer loop header 135 // CHECK: [[O_IV:%.+]] = load i32, i32* [[OMP_IV]] 136 // CHECK-NEXT: [[O_UB:%.+]] = load i32, i32* [[OMP_UB]] 137 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ule i32 [[O_IV]], [[O_UB]] 138 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 139 140 // Loop header 141 // CHECK: [[O_LOOP1_BODY]] 142 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 143 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 144 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB]] 145 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 146 for (unsigned i = 131071; i <= 2147483647; i += 127) { 147 // CHECK: [[LOOP1_BODY]] 148 // Start of body: calculate i from IV: 149 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 150 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i32 [[IV1_1]], 127 151 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 131071, [[CALC_I_1]] 152 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 153 // ... loop body ... 154 // End of body: store into a[i]: 155 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 156 a[i] = b[i] * c[i] * d[i]; 157 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 158 // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1 159 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 160 // CHECK-NEXT: br label %{{.+}} 161 } 162 // CHECK: [[LOOP1_END]] 163 // Update the counters, adding stride 164 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 165 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 166 // CHECK-NEXT: [[ADD_LB:%.+]] = add i32 [[LB]], [[ST]] 167 // CHECK-NEXT: store i32 [[ADD_LB]], i32* [[OMP_LB]] 168 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 169 // CHECK-NEXT: [[ST:%.+]] = load i32, i32* [[OMP_ST]] 170 // CHECK-NEXT: [[ADD_UB:%.+]] = add i32 [[UB]], [[ST]] 171 // CHECK-NEXT: store i32 [[ADD_UB]], i32* [[OMP_UB]] 172 173 // CHECK: [[O_LOOP1_END]] 174 // CHECK: call void @__kmpc_for_static_fini([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]]) 175 // CHECK: ret void 176 } 177 178 // CHECK-LABEL: define {{.*void}} @{{.*}}dynamic1{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 179 void dynamic1(float *a, float *b, float *c, float *d) { 180 #pragma omp parallel for schedule(dynamic) 181 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 182 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 183 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 184 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 185 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 186 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 35, i64 0, i64 16908287, i64 1, i64 1) 187 // 188 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 189 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 190 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 191 192 // Loop header 193 // CHECK: [[O_LOOP1_BODY]] 194 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 195 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 196 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 197 198 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 199 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 200 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 201 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 202 // CHECK: [[LOOP1_BODY]] 203 // Start of body: calculate i from IV: 204 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 205 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 206 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 207 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 208 // ... loop body ... 209 // End of body: store into a[i]: 210 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 211 a[i] = b[i] * c[i] * d[i]; 212 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 213 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 214 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 215 // CHECK-NEXT: br label %{{.+}} 216 } 217 // CHECK: [[LOOP1_END]] 218 // CHECK: [[O_LOOP1_END]] 219 // CHECK: ret void 220 } 221 222 // CHECK-LABEL: define {{.*void}} @{{.*}}guided7{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 223 void guided7(float *a, float *b, float *c, float *d) { 224 #pragma omp parallel for schedule(guided, 7) 225 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 226 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 227 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 228 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 229 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 230 // CHECK: call void @__kmpc_dispatch_init_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 36, i64 0, i64 16908287, i64 1, i64 7) 231 // 232 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8u([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 233 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 234 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 235 236 // Loop header 237 // CHECK: [[O_LOOP1_BODY]] 238 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 239 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 240 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 241 242 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 243 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i64 [[IV]], [[UB]] 244 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 245 for (unsigned long long i = 131071; i < 2147483647; i += 127) { 246 // CHECK: [[LOOP1_BODY]] 247 // Start of body: calculate i from IV: 248 // CHECK: [[IV1_1:%.+]] = load i64, i64* [[OMP_IV]] 249 // CHECK-NEXT: [[CALC_I_1:%.+]] = mul i64 [[IV1_1]], 127 250 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i64 131071, [[CALC_I_1]] 251 // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] 252 // ... loop body ... 253 // End of body: store into a[i]: 254 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 255 a[i] = b[i] * c[i] * d[i]; 256 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 257 // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 258 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 259 // CHECK-NEXT: br label %{{.+}} 260 } 261 // CHECK: [[LOOP1_END]] 262 // CHECK: [[O_LOOP1_END]] 263 // CHECK: ret void 264 } 265 266 // CHECK-LABEL: define {{.*void}} @{{.*}}test_auto{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 267 void test_auto(float *a, float *b, float *c, float *d) { 268 unsigned int x = 0; 269 unsigned int y = 0; 270 #pragma omp parallel for schedule(auto) collapse(2) 271 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 272 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 273 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 274 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 275 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 276 // CHECK: call void @__kmpc_dispatch_init_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 38, i64 0, i64 [[LAST_ITER:%[^,]+]], i64 1, i64 1) 277 // 278 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 279 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 280 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_8([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i64* [[OMP_LB:%[^,]+]], i64* [[OMP_UB:%[^,]+]], i64* [[OMP_ST:%[^,]+]]) 281 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 282 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 283 284 // Loop header 285 // CHECK: [[O_LOOP1_BODY]] 286 // CHECK: [[LB:%.+]] = load i64, i64* [[OMP_LB]] 287 // CHECK-NEXT: store i64 [[LB]], i64* [[OMP_IV:[^,]+]] 288 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 289 290 // CHECK-NEXT: [[UB:%.+]] = load i64, i64* [[OMP_UB]] 291 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB]] 292 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 293 // FIXME: When the iteration count of some nested loop is not a known constant, 294 // we should pre-calculate it, like we do for the total number of iterations! 295 for (char i = static_cast<char>(y); i <= '9'; ++i) 296 for (x = 11; x > 0; --x) { 297 // CHECK: [[LOOP1_BODY]] 298 // Start of body: indices are calculated from IV: 299 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 300 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 301 // ... loop body ... 302 // End of body: store into a[i]: 303 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 304 a[i] = b[i] * c[i] * d[i]; 305 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} 306 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 307 // CHECK-NEXT: store i64 [[ADD1_2]], i64* [[OMP_IV]] 308 // CHECK-NEXT: br label %{{.+}} 309 } 310 // CHECK: [[LOOP1_END]] 311 // CHECK: [[O_LOOP1_END]] 312 // CHECK: ret void 313 } 314 315 // CHECK-LABEL: define {{.*void}} @{{.*}}runtime{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 316 void runtime(float *a, float *b, float *c, float *d) { 317 int x = 0; 318 #pragma omp parallel for collapse(2) schedule(runtime) 319 // CHECK: call void ([[IDENT_T_TY]]*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call([[IDENT_T_TY]]* [[DEFAULT_LOC:[@%].+]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, float**, float**, float**, float**)* [[OMP_PARALLEL_FUNC:@.+]] to void (i32*, i32*, ...)*), 320 // CHECK: define internal void [[OMP_PARALLEL_FUNC]](i32* noalias [[GTID_PARAM_ADDR:%.+]], i32* noalias %{{.+}}, i32* dereferenceable(4) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}, float** dereferenceable(8) %{{.+}}) 321 // CHECK: store i32* [[GTID_PARAM_ADDR]], i32** [[GTID_REF_ADDR:%.+]], 322 // CHECK: [[GTID_REF:%.+]] = load i32*, i32** [[GTID_REF_ADDR]], 323 // CHECK: [[GTID:%.+]] = load i32, i32* [[GTID_REF]], 324 // CHECK: call void @__kmpc_dispatch_init_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32 37, i32 0, i32 199, i32 1, i32 1) 325 // 326 // CHECK: [[HASWORK:%.+]] = call i32 @__kmpc_dispatch_next_4([[IDENT_T_TY]]* [[DEFAULT_LOC]], i32 [[GTID]], i32* [[OMP_ISLAST:%[^,]+]], i32* [[OMP_LB:%[^,]+]], i32* [[OMP_UB:%[^,]+]], i32* [[OMP_ST:%[^,]+]]) 327 // CHECK-NEXT: [[O_CMP:%.+]] = icmp ne i32 [[HASWORK]], 0 328 // CHECK-NEXT: br i1 [[O_CMP]], label %[[O_LOOP1_BODY:[^,]+]], label %[[O_LOOP1_END:[^,]+]] 329 330 // Loop header 331 // CHECK: [[O_LOOP1_BODY]] 332 // CHECK: [[LB:%.+]] = load i32, i32* [[OMP_LB]] 333 // CHECK-NEXT: store i32 [[LB]], i32* [[OMP_IV:[^,]+]] 334 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 335 336 // CHECK-NEXT: [[UB:%.+]] = load i32, i32* [[OMP_UB]] 337 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB]] 338 // CHECK-NEXT: br i1 [[CMP]], label %[[LOOP1_BODY:[^,]+]], label %[[LOOP1_END:[^,]+]] 339 for (unsigned char i = '0' ; i <= '9'; ++i) 340 for (x = -10; x < 10; ++x) { 341 // CHECK: [[LOOP1_BODY]] 342 // Start of body: indices are calculated from IV: 343 // CHECK: store i8 {{%[^,]+}}, i8* {{%[^,]+}} 344 // CHECK: store i32 {{%[^,]+}}, i32* {{%[^,]+}} 345 // ... loop body ... 346 // End of body: store into a[i]: 347 // CHECK: store float [[RESULT:%.+]], float* {{%.+}} 348 a[i] = b[i] * c[i] * d[i]; 349 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} 350 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 351 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 352 // CHECK-NEXT: br label %{{.+}} 353 } 354 // CHECK: [[LOOP1_END]] 355 // CHECK: [[O_LOOP1_END]] 356 // CHECK: ret void 357 } 358 359 // TERM_DEBUG-LABEL: foo 360 int foo() {return 0;}; 361 362 // TERM_DEBUG-LABEL: parallel_for 363 // CLEANUP: parallel_for 364 void parallel_for(float *a, int n) { 365 float arr[n]; 366 #pragma omp parallel for schedule(static, 5) private(arr) 367 // TERM_DEBUG-NOT: __kmpc_global_thread_num 368 // TERM_DEBUG: call void @__kmpc_for_static_init_4u({{.+}}), !dbg [[DBG_LOC_START:![0-9]+]] 369 // TERM_DEBUG: invoke i32 {{.*}}foo{{.*}}() 370 // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], 371 // TERM_DEBUG-NOT: __kmpc_global_thread_num 372 // TERM_DEBUG: call void @__kmpc_for_static_fini({{.+}}), !dbg [[DBG_LOC_END:![0-9]+]] 373 // TERM_DEBUG: [[TERM_LPAD]] 374 // TERM_DEBUG: call void @__clang_call_terminate 375 // TERM_DEBUG: unreachable 376 // CLEANUP-NOT: __kmpc_global_thread_num 377 // CLEANUP: call void @__kmpc_for_static_init_4u({{.+}}) 378 // CLEANUP: call void @__kmpc_for_static_fini({{.+}}) 379 for (unsigned i = 131071; i <= 2147483647; i += 127) 380 a[i] += foo() + arr[i]; 381 } 382 // Check source line corresponds to "#pragma omp parallel for schedule(static, 5)" above: 383 // TERM_DEBUG-DAG: [[DBG_LOC_START]] = !DILocation(line: [[@LINE-4]], 384 // TERM_DEBUG-DAG: [[DBG_LOC_END]] = !DILocation(line: [[@LINE-18]], 385 386 #endif // HEADER 387 388