1 /*
2  * Copyright © 2008 Nicolai Haehnle
3  * Copyright © 2008 Jérôme Glisse
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  */
26 /*
27  * Authors:
28  *      Aapo Tahkola <aet@rasterburn.org>
29  *      Nicolai Haehnle <prefect_@gmx.net>
30  *      Jérôme Glisse <glisse@freedesktop.org>
31  */
32 #ifndef RADEON_CS_H
33 #define RADEON_CS_H
34 
35 #include <stdint.h>
36 #include <string.h>
37 #include "drm.h"
38 #include "radeon_drm.h"
39 #include "radeon_bo.h"
40 
41 struct radeon_cs_reloc {
42     struct radeon_bo    *bo;
43     uint32_t            read_domain;
44     uint32_t            write_domain;
45     uint32_t            flags;
46 };
47 
48 
49 #define RADEON_CS_SPACE_OK 0
50 #define RADEON_CS_SPACE_OP_TO_BIG 1
51 #define RADEON_CS_SPACE_FLUSH 2
52 
53 struct radeon_cs {
54     uint32_t *packets;
55     unsigned cdw;
56     unsigned ndw;
57     unsigned                    section_ndw;
58     unsigned                    section_cdw;
59 };
60 
61 #define MAX_SPACE_BOS (32)
62 
63 struct radeon_cs_manager;
64 
65 extern struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm,
66                                           uint32_t ndw);
67 
68 extern int radeon_cs_begin(struct radeon_cs *cs,
69                            uint32_t ndw,
70                            const char *file,
71                            const char *func, int line);
72 extern int radeon_cs_end(struct radeon_cs *cs,
73                          const char *file,
74                          const char *func,
75                          int line);
76 extern int radeon_cs_emit(struct radeon_cs *cs);
77 extern int radeon_cs_destroy(struct radeon_cs *cs);
78 extern int radeon_cs_erase(struct radeon_cs *cs);
79 extern int radeon_cs_need_flush(struct radeon_cs *cs);
80 extern void radeon_cs_print(struct radeon_cs *cs, FILE *file);
81 extern void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit);
82 extern void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data);
83 extern int radeon_cs_write_reloc(struct radeon_cs *cs,
84                                  struct radeon_bo *bo,
85                                  uint32_t read_domain,
86                                  uint32_t write_domain,
87                                  uint32_t flags);
88 extern uint32_t radeon_cs_get_id(struct radeon_cs *cs);
89 /*
90  * add a persistent BO to the list
91  * a persistent BO is one that will be referenced across flushes,
92  * i.e. colorbuffer, textures etc.
93  * They get reset when a new "operation" happens, where an operation
94  * is a state emission with a color/textures etc followed by a bunch of vertices.
95  */
96 void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs,
97                                        struct radeon_bo *bo,
98                                        uint32_t read_domains,
99                                        uint32_t write_domain);
100 
101 /* reset the persistent BO list */
102 void radeon_cs_space_reset_bos(struct radeon_cs *cs);
103 
104 /* do a space check with the current persistent BO list */
105 int radeon_cs_space_check(struct radeon_cs *cs);
106 
107 /* do a space check with the current persistent BO list and a temporary BO
108  * a temporary BO is like a DMA buffer, which  gets flushed with the
109  * command buffer */
110 int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
111                                   struct radeon_bo *bo,
112                                   uint32_t read_domains,
113                                   uint32_t write_domain);
114 
radeon_cs_write_dword(struct radeon_cs * cs,uint32_t dword)115 static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
116 {
117     cs->packets[cs->cdw++] = dword;
118     if (cs->section_ndw) {
119         cs->section_cdw++;
120     }
121 }
122 
radeon_cs_write_qword(struct radeon_cs * cs,uint64_t qword)123 static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword)
124 {
125     memcpy(cs->packets + cs->cdw, &qword, sizeof(uint64_t));
126     cs->cdw += 2;
127     if (cs->section_ndw) {
128         cs->section_cdw += 2;
129     }
130 }
131 
radeon_cs_write_table(struct radeon_cs * cs,const void * data,uint32_t size)132 static inline void radeon_cs_write_table(struct radeon_cs *cs,
133                                          const void *data, uint32_t size)
134 {
135     memcpy(cs->packets + cs->cdw, data, size * 4);
136     cs->cdw += size;
137     if (cs->section_ndw) {
138         cs->section_cdw += size;
139     }
140 }
141 #endif
142