1; RUN: llc -O1 -mtriple=armv7s-apple-ios -mcpu=swift < %s -disable-adv-copy-opt=true | FileCheck -check-prefix=NOOPT --check-prefix=CHECK %s 2; RUN: llc -O1 -mtriple=armv7s-apple-ios -mcpu=swift < %s -disable-adv-copy-opt=false | FileCheck -check-prefix=OPT --check-prefix=CHECK %s 3; RUN: llc -O1 -mtriple=thumbv7s-apple-ios -mcpu=swift < %s -disable-adv-copy-opt=true | FileCheck -check-prefix=NOOPT --check-prefix=CHECK %s 4; RUN: llc -O1 -mtriple=thumbv7s-apple-ios -mcpu=swift < %s -disable-adv-copy-opt=false | FileCheck -check-prefix=OPT --check-prefix=CHECK %s 5 6; CHECK-LABEL: simpleVectorDiv 7; ABI: %A => r0, r1. 8; %B => r2, r3 9; ret => r0, r1 10; We want to compute: 11; r0 = r0 / r2 12; r1 = r1 / r3 13; 14; NOOPT: vmov [[A:d[0-9]+]], r0, r1 15; NOOPT-NEXT: vmov [[B:d[0-9]+]], r2, r3 16; Move the low part of B into a register. 17; Unfortunately, we cannot express that the 's' register is the low 18; part of B, i.e., sIdx == BIdx x 2. E.g., B = d1, B_low = s2. 19; NOOPT-NEXT: vmov [[B_LOW:r[0-9]+]], s{{[0-9]+}} 20; NOOPT-NEXT: vmov [[B_HIGH:r[0-9]+]], s{{[0-9]+}} 21; NOOPT-NEXT: vmov [[A_LOW:r[0-9]+]], s{{[0-9]+}} 22; NOOPT-NEXT: vmov [[A_HIGH:r[0-9]+]], s{{[0-9]+}} 23; NOOPT-NEXT: udiv [[RES_LOW:r[0-9]+]], [[A_LOW]], [[B_LOW]] 24; NOOPT-NEXT: vmov.32 [[RES:d[0-9]+]][0], [[RES_LOW]] 25; NOOPT-NEXT: udiv [[RES_HIGH:r[0-9]+]], [[A_HIGH]], [[B_HIGH]] 26; NOOPT-NEXT: vmov.32 [[RES]][1], [[RES_HIGH]] 27; NOOPT-NEXT: vmov r0, r1, [[RES]] 28; NOOPT-NEXT: bx lr 29; 30; OPT-NOT: vmov 31; OPT: udiv r1, r1, r3 32; OPT-NEXT: udiv r0, r0, r2 33; OPT-NEXT: bx lr 34define <2 x i32> @simpleVectorDiv(<2 x i32> %A, <2 x i32> %B) nounwind { 35entry: 36 %div = udiv <2 x i32> %A, %B 37 ret <2 x i32> %div 38} 39