1; RUN: llc %s -o - | FileCheck %s
2
3target triple = "thumbv7s-apple-ios"
4
5declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %shuffle.i.i307, <8 x i8> %shuffle.i27.i308, <8 x i8> %vtbl2.i25.i)
6
7; Check that we get the motivating example:
8; The bitcasts force the values to go through the GPRs, whereas
9; they are defined on VPRs and used on VPRs.
10;
11; CHECK-LABEL: motivatingExample:
12; CHECK: vldr [[ARG2_VAL:d[0-9]+]], [r1]
13; CHECK-NEXT: vld1.32 {[[ARG1_VALlo:d[0-9]+]], [[ARG1_VALhi:d[0-9]+]]}, [r0]
14; CHECK-NEXT: vtbl.8 [[RES:d[0-9]+]], {[[ARG1_VALlo]], [[ARG1_VALhi]]}, [[ARG2_VAL]]
15; CHECK-NEXT: vstr [[RES]], [r1]
16; CHECK-NEXT: bx lr
17define void @motivatingExample(<2 x i64>* %addr, <8 x i8>* %addr2) {
18  %shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
19  %vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2
20  %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
21  %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
22  %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
23  %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
24  %vtbl2.i25.i313 = tail call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp45, <8 x i8> %tmp46, <8 x i8> %vtbl2.i25.i)
25  store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2
26  ret void
27}
28
29; Check that we do not perform the transformation for dynamic index.
30; CHECK-LABEL: dynamicIndex:
31; CHECK-NOT: mul
32; CHECK: pop
33define void @dynamicIndex(<2 x i64>* %addr, <8 x i8>* %addr2, i32 %index) {
34  %shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
35  %vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2
36  %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 %index
37  %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
38  %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
39  %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
40  %vtbl2.i25.i313 = tail call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp45, <8 x i8> %tmp46, <8 x i8> %vtbl2.i25.i)
41  store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2
42  ret void
43}
44
45; Check that we do not perform the transformation when there are several uses
46; of the result of the bitcast.
47; CHECK-LABEL: severalUses:
48; ARG1_VALlo is hard coded because we need to access the high part of d0,
49; i.e., s1, and we can't express that with filecheck.
50; CHECK: vld1.32 {[[ARG1_VALlo:d0]], [[ARG1_VALhi:d[0-9]+]]}, [r0]
51; CHECK-NEXT: vldr [[ARG2_VAL:d[0-9]+]], [r1]
52; s1 is actually 2 * ARG1_VALlo + 1, but we cannot express that with filecheck.
53; CHECK-NEXT: vmov [[REThi:r[0-9]+]], s1
54; We build the return value here. s0 is 2 * ARG1_VALlo.
55; CHECK-NEXT: vmov r0, s0
56; This copy is correct but actually useless. We should be able to clean it up.
57; CHECK-NEXT: vmov [[ARG1_VALloCPY:d[0-9]+]], r0, [[REThi]]
58; CHECK-NEXT: vtbl.8 [[RES:d[0-9]+]], {[[ARG1_VALloCPY]], [[ARG1_VALhi]]}, [[ARG2_VAL]]
59; CHECK-NEXT: vstr [[RES]], [r1]
60; CHECK-NEXT: mov r1, [[REThi]]
61; CHECK-NEXT: bx lr
62define i64 @severalUses(<2 x i64>* %addr, <8 x i8>* %addr2) {
63  %shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
64  %vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2
65  %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
66  %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
67  %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
68  %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
69  %vtbl2.i25.i313 = tail call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp45, <8 x i8> %tmp46, <8 x i8> %vtbl2.i25.i)
70  store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2
71  ret i64 %shuffle.i.extract.i310
72}
73