1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=SSE3 3; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41 4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX_ANY 5; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX_ANY 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX_X86_64 7 8define <3 x i16> @zext_i8(<3 x i8>) { 9; SSE3-LABEL: zext_i8: 10; SSE3: # BB#0: 11; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax 12; SSE3-NEXT: pxor %xmm0, %xmm0 13; SSE3-NEXT: pxor %xmm1, %xmm1 14; SSE3-NEXT: pinsrw $0, %eax, %xmm1 15; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax 16; SSE3-NEXT: pinsrw $1, %eax, %xmm1 17; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax 18; SSE3-NEXT: pinsrw $2, %eax, %xmm1 19; SSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 20; SSE3-NEXT: movd %xmm1, %eax 21; SSE3-NEXT: pextrw $2, %xmm1, %edx 22; SSE3-NEXT: pextrw $4, %xmm1, %ecx 23; SSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 24; SSE3-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 25; SSE3-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 26; SSE3-NEXT: retl 27; 28; SSE41-LABEL: zext_i8: 29; SSE41: # BB#0: 30; SSE41-NEXT: pxor %xmm0, %xmm0 31; SSE41-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm0 32; SSE41-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm0 33; SSE41-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm0 34; SSE41-NEXT: movd %xmm0, %eax 35; SSE41-NEXT: pextrw $2, %xmm0, %edx 36; SSE41-NEXT: pextrw $4, %xmm0, %ecx 37; SSE41-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 38; SSE41-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 39; SSE41-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 40; SSE41-NEXT: retl 41; 42; AVX_ANY-LABEL: zext_i8: 43; AVX_ANY: # BB#0: 44; AVX_ANY-NEXT: vpxor %xmm0, %xmm0, %xmm0 45; AVX_ANY-NEXT: vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0 46; AVX_ANY-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0 47; AVX_ANY-NEXT: vpinsrb $8, {{[0-9]+}}(%esp), %xmm0, %xmm0 48; AVX_ANY-NEXT: vmovd %xmm0, %eax 49; AVX_ANY-NEXT: vpextrw $2, %xmm0, %edx 50; AVX_ANY-NEXT: vpextrw $4, %xmm0, %ecx 51; AVX_ANY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 52; AVX_ANY-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 53; AVX_ANY-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 54; AVX_ANY-NEXT: retl 55; 56; AVX_X86_64-LABEL: zext_i8: 57; AVX_X86_64: # BB#0: 58; AVX_X86_64-NEXT: vmovd %edi, %xmm0 59; AVX_X86_64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0 60; AVX_X86_64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0 61; AVX_X86_64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 62; AVX_X86_64-NEXT: vmovd %xmm0, %eax 63; AVX_X86_64-NEXT: vpextrw $2, %xmm0, %edx 64; AVX_X86_64-NEXT: vpextrw $4, %xmm0, %ecx 65; AVX_X86_64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 66; AVX_X86_64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 67; AVX_X86_64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 68; AVX_X86_64-NEXT: retq 69 %2 = zext <3 x i8> %0 to <3 x i16> 70 ret <3 x i16> %2 71} 72 73define <3 x i16> @sext_i8(<3 x i8>) { 74; SSE3-LABEL: sext_i8: 75; SSE3: # BB#0: 76; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax 77; SSE3-NEXT: pinsrw $0, %eax, %xmm0 78; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax 79; SSE3-NEXT: pinsrw $1, %eax, %xmm0 80; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax 81; SSE3-NEXT: pinsrw $2, %eax, %xmm0 82; SSE3-NEXT: psllw $8, %xmm0 83; SSE3-NEXT: psraw $8, %xmm0 84; SSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 85; SSE3-NEXT: psrad $16, %xmm0 86; SSE3-NEXT: movd %xmm0, %eax 87; SSE3-NEXT: pextrw $2, %xmm0, %edx 88; SSE3-NEXT: pextrw $4, %xmm0, %ecx 89; SSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 90; SSE3-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 91; SSE3-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 92; SSE3-NEXT: retl 93; 94; SSE41-LABEL: sext_i8: 95; SSE41: # BB#0: 96; SSE41-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm0 97; SSE41-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm0 98; SSE41-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm0 99; SSE41-NEXT: pslld $24, %xmm0 100; SSE41-NEXT: psrad $24, %xmm0 101; SSE41-NEXT: movd %xmm0, %eax 102; SSE41-NEXT: pextrw $2, %xmm0, %edx 103; SSE41-NEXT: pextrw $4, %xmm0, %ecx 104; SSE41-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 105; SSE41-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 106; SSE41-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 107; SSE41-NEXT: retl 108; 109; AVX_ANY-LABEL: sext_i8: 110; AVX_ANY: # BB#0: 111; AVX_ANY-NEXT: vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0 112; AVX_ANY-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0 113; AVX_ANY-NEXT: vpinsrb $8, {{[0-9]+}}(%esp), %xmm0, %xmm0 114; AVX_ANY-NEXT: vpslld $24, %xmm0, %xmm0 115; AVX_ANY-NEXT: vpsrad $24, %xmm0, %xmm0 116; AVX_ANY-NEXT: vmovd %xmm0, %eax 117; AVX_ANY-NEXT: vpextrw $2, %xmm0, %edx 118; AVX_ANY-NEXT: vpextrw $4, %xmm0, %ecx 119; AVX_ANY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 120; AVX_ANY-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 121; AVX_ANY-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 122; AVX_ANY-NEXT: retl 123; 124; AVX_X86_64-LABEL: sext_i8: 125; AVX_X86_64: # BB#0: 126; AVX_X86_64-NEXT: vmovd %edi, %xmm0 127; AVX_X86_64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0 128; AVX_X86_64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0 129; AVX_X86_64-NEXT: vpslld $24, %xmm0, %xmm0 130; AVX_X86_64-NEXT: vpsrad $24, %xmm0, %xmm0 131; AVX_X86_64-NEXT: vmovd %xmm0, %eax 132; AVX_X86_64-NEXT: vpextrw $2, %xmm0, %edx 133; AVX_X86_64-NEXT: vpextrw $4, %xmm0, %ecx 134; AVX_X86_64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 135; AVX_X86_64-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 136; AVX_X86_64-NEXT: # kill: %CX<def> %CX<kill> %ECX<kill> 137; AVX_X86_64-NEXT: retq 138 %2 = sext <3 x i8> %0 to <3 x i16> 139 ret <3 x i16> %2 140} 141