1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2,-sse4.1 < %s | FileCheck %s 3 4; Verify that we don't emit packed vector shifts instructions if the 5; condition used by the vector select is a vector of constants. 6 7define <4 x float> @test1(<4 x float> %a, <4 x float> %b) { 8; CHECK-LABEL: test1: 9; CHECK: # BB#0: 10; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,3] 11; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3] 12; CHECK-NEXT: retq 13 %1 = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x float> %a, <4 x float> %b 14 ret <4 x float> %1 15} 16 17define <4 x float> @test2(<4 x float> %a, <4 x float> %b) { 18; CHECK-LABEL: test2: 19; CHECK: # BB#0: 20; CHECK-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 21; CHECK-NEXT: movapd %xmm1, %xmm0 22; CHECK-NEXT: retq 23 %1 = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x float> %a, <4 x float> %b 24 ret <4 x float> %1 25} 26 27define <4 x float> @test3(<4 x float> %a, <4 x float> %b) { 28; CHECK-LABEL: test3: 29; CHECK: # BB#0: 30; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 31; CHECK-NEXT: retq 32 %1 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %a, <4 x float> %b 33 ret <4 x float> %1 34} 35 36define <4 x float> @test4(<4 x float> %a, <4 x float> %b) { 37; CHECK-LABEL: test4: 38; CHECK: # BB#0: 39; CHECK-NEXT: movaps %xmm1, %xmm0 40; CHECK-NEXT: retq 41 %1 = select <4 x i1> <i1 false, i1 false, i1 false, i1 false>, <4 x float> %a, <4 x float> %b 42 ret <4 x float> %1 43} 44 45define <4 x float> @test5(<4 x float> %a, <4 x float> %b) { 46; CHECK-LABEL: test5: 47; CHECK: # BB#0: 48; CHECK-NEXT: retq 49 %1 = select <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %b 50 ret <4 x float> %1 51} 52 53define <8 x i16> @test6(<8 x i16> %a, <8 x i16> %b) { 54; CHECK-LABEL: test6: 55; CHECK: # BB#0: 56; CHECK-NEXT: retq 57 %1 = select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false>, <8 x i16> %a, <8 x i16> %a 58 ret <8 x i16> %1 59} 60 61define <8 x i16> @test7(<8 x i16> %a, <8 x i16> %b) { 62; CHECK-LABEL: test7: 63; CHECK: # BB#0: 64; CHECK-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 65; CHECK-NEXT: movapd %xmm1, %xmm0 66; CHECK-NEXT: retq 67 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %a, <8 x i16> %b 68 ret <8 x i16> %1 69} 70 71define <8 x i16> @test8(<8 x i16> %a, <8 x i16> %b) { 72; CHECK-LABEL: test8: 73; CHECK: # BB#0: 74; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 75; CHECK-NEXT: retq 76 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 false, i1 true, i1 true, i1 true, i1 true>, <8 x i16> %a, <8 x i16> %b 77 ret <8 x i16> %1 78} 79 80define <8 x i16> @test9(<8 x i16> %a, <8 x i16> %b) { 81; CHECK-LABEL: test9: 82; CHECK: # BB#0: 83; CHECK-NEXT: movaps %xmm1, %xmm0 84; CHECK-NEXT: retq 85 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %a, <8 x i16> %b 86 ret <8 x i16> %1 87} 88 89define <8 x i16> @test10(<8 x i16> %a, <8 x i16> %b) { 90; CHECK-LABEL: test10: 91; CHECK: # BB#0: 92; CHECK-NEXT: retq 93 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x i16> %a, <8 x i16> %b 94 ret <8 x i16> %1 95} 96 97define <8 x i16> @test11(<8 x i16> %a, <8 x i16> %b) { 98; CHECK-LABEL: test11: 99; CHECK: # BB#0: 100; CHECK-NEXT: movaps {{.*#+}} xmm2 = [0,65535,65535,0,65535,65535,65535,65535] 101; CHECK-NEXT: andps %xmm2, %xmm0 102; CHECK-NEXT: andnps %xmm1, %xmm2 103; CHECK-NEXT: orps %xmm2, %xmm0 104; CHECK-NEXT: retq 105 %1 = select <8 x i1> <i1 false, i1 true, i1 true, i1 false, i1 undef, i1 true, i1 true, i1 undef>, <8 x i16> %a, <8 x i16> %b 106 ret <8 x i16> %1 107} 108 109define <8 x i16> @test12(<8 x i16> %a, <8 x i16> %b) { 110; CHECK-LABEL: test12: 111; CHECK: # BB#0: 112; CHECK-NEXT: movaps %xmm1, %xmm0 113; CHECK-NEXT: retq 114 %1 = select <8 x i1> <i1 false, i1 false, i1 undef, i1 false, i1 false, i1 false, i1 false, i1 undef>, <8 x i16> %a, <8 x i16> %b 115 ret <8 x i16> %1 116} 117 118define <8 x i16> @test13(<8 x i16> %a, <8 x i16> %b) { 119; CHECK-LABEL: test13: 120; CHECK: # BB#0: 121; CHECK-NEXT: movaps %xmm1, %xmm0 122; CHECK-NEXT: retq 123 %1 = select <8 x i1> <i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef, i1 undef>, <8 x i16> %a, <8 x i16> %b 124 ret <8 x i16> %1 125} 126 127; Fold (vselect (build_vector AllOnes), N1, N2) -> N1 128define <4 x float> @test14(<4 x float> %a, <4 x float> %b) { 129; CHECK-LABEL: test14: 130; CHECK: # BB#0: 131; CHECK-NEXT: retq 132 %1 = select <4 x i1> <i1 true, i1 undef, i1 true, i1 undef>, <4 x float> %a, <4 x float> %b 133 ret <4 x float> %1 134} 135 136define <8 x i16> @test15(<8 x i16> %a, <8 x i16> %b) { 137; CHECK-LABEL: test15: 138; CHECK: # BB#0: 139; CHECK-NEXT: retq 140 %1 = select <8 x i1> <i1 true, i1 true, i1 true, i1 undef, i1 undef, i1 true, i1 true, i1 undef>, <8 x i16> %a, <8 x i16> %b 141 ret <8 x i16> %1 142} 143 144; Fold (vselect (build_vector AllZeros), N1, N2) -> N2 145define <4 x float> @test16(<4 x float> %a, <4 x float> %b) { 146; CHECK-LABEL: test16: 147; CHECK: # BB#0: 148; CHECK-NEXT: movaps %xmm1, %xmm0 149; CHECK-NEXT: retq 150 %1 = select <4 x i1> <i1 false, i1 undef, i1 false, i1 undef>, <4 x float> %a, <4 x float> %b 151 ret <4 x float> %1 152} 153 154define <8 x i16> @test17(<8 x i16> %a, <8 x i16> %b) { 155; CHECK-LABEL: test17: 156; CHECK: # BB#0: 157; CHECK-NEXT: movaps %xmm1, %xmm0 158; CHECK-NEXT: retq 159 %1 = select <8 x i1> <i1 false, i1 false, i1 false, i1 undef, i1 undef, i1 false, i1 false, i1 undef>, <8 x i16> %a, <8 x i16> %b 160 ret <8 x i16> %1 161} 162 163define <4 x float> @test18(<4 x float> %a, <4 x float> %b) { 164; CHECK-LABEL: test18: 165; CHECK: # BB#0: 166; CHECK-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] 167; CHECK-NEXT: retq 168 %1 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %a, <4 x float> %b 169 ret <4 x float> %1 170} 171 172define <4 x i32> @test19(<4 x i32> %a, <4 x i32> %b) { 173; CHECK-LABEL: test19: 174; CHECK: # BB#0: 175; CHECK-NEXT: movss {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3] 176; CHECK-NEXT: retq 177 %1 = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x i32> %a, <4 x i32> %b 178 ret <4 x i32> %1 179} 180 181define <2 x double> @test20(<2 x double> %a, <2 x double> %b) { 182; CHECK-LABEL: test20: 183; CHECK: # BB#0: 184; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 185; CHECK-NEXT: retq 186 %1 = select <2 x i1> <i1 false, i1 true>, <2 x double> %a, <2 x double> %b 187 ret <2 x double> %1 188} 189 190define <2 x i64> @test21(<2 x i64> %a, <2 x i64> %b) { 191; CHECK-LABEL: test21: 192; CHECK: # BB#0: 193; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 194; CHECK-NEXT: retq 195 %1 = select <2 x i1> <i1 false, i1 true>, <2 x i64> %a, <2 x i64> %b 196 ret <2 x i64> %1 197} 198 199define <4 x float> @test22(<4 x float> %a, <4 x float> %b) { 200; CHECK-LABEL: test22: 201; CHECK: # BB#0: 202; CHECK-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] 203; CHECK-NEXT: movaps %xmm1, %xmm0 204; CHECK-NEXT: retq 205 %1 = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %a, <4 x float> %b 206 ret <4 x float> %1 207} 208 209define <4 x i32> @test23(<4 x i32> %a, <4 x i32> %b) { 210; CHECK-LABEL: test23: 211; CHECK: # BB#0: 212; CHECK-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3] 213; CHECK-NEXT: movaps %xmm1, %xmm0 214; CHECK-NEXT: retq 215 %1 = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i32> %a, <4 x i32> %b 216 ret <4 x i32> %1 217} 218 219define <2 x double> @test24(<2 x double> %a, <2 x double> %b) { 220; CHECK-LABEL: test24: 221; CHECK: # BB#0: 222; CHECK-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 223; CHECK-NEXT: movapd %xmm1, %xmm0 224; CHECK-NEXT: retq 225 %1 = select <2 x i1> <i1 true, i1 false>, <2 x double> %a, <2 x double> %b 226 ret <2 x double> %1 227} 228 229define <2 x i64> @test25(<2 x i64> %a, <2 x i64> %b) { 230; CHECK-LABEL: test25: 231; CHECK: # BB#0: 232; CHECK-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 233; CHECK-NEXT: movapd %xmm1, %xmm0 234; CHECK-NEXT: retq 235 %1 = select <2 x i1> <i1 true, i1 false>, <2 x i64> %a, <2 x i64> %b 236 ret <2 x i64> %1 237} 238 239define <4 x float> @select_of_shuffles_0(<2 x float> %a0, <2 x float> %b0, <2 x float> %a1, <2 x float> %b1) { 240; CHECK-LABEL: select_of_shuffles_0: 241; CHECK: # BB#0: 242; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 243; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm3[0] 244; CHECK-NEXT: subps %xmm1, %xmm0 245; CHECK-NEXT: retq 246 %1 = shufflevector <2 x float> %a0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> 247 %2 = shufflevector <2 x float> %a1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1> 248 %3 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %2, <4 x float> %1 249 %4 = shufflevector <2 x float> %b0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> 250 %5 = shufflevector <2 x float> %b1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1> 251 %6 = select <4 x i1> <i1 false, i1 false, i1 true, i1 true>, <4 x float> %5, <4 x float> %4 252 %7 = fsub <4 x float> %3, %6 253 ret <4 x float> %7 254} 255 256; PR20677 257define <16 x double> @select_illegal(<16 x double> %a, <16 x double> %b) { 258; CHECK-LABEL: select_illegal: 259; CHECK: # BB#0: 260; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm4 261; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm5 262; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm6 263; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm7 264; CHECK-NEXT: movaps %xmm7, 112(%rdi) 265; CHECK-NEXT: movaps %xmm6, 96(%rdi) 266; CHECK-NEXT: movaps %xmm5, 80(%rdi) 267; CHECK-NEXT: movaps %xmm4, 64(%rdi) 268; CHECK-NEXT: movaps %xmm3, 48(%rdi) 269; CHECK-NEXT: movaps %xmm2, 32(%rdi) 270; CHECK-NEXT: movaps %xmm1, 16(%rdi) 271; CHECK-NEXT: movaps %xmm0, (%rdi) 272; CHECK-NEXT: movq %rdi, %rax 273; CHECK-NEXT: retq 274 %sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b 275 ret <16 x double> %sel 276} 277