1; RUN: llc < %s -march=arm | grep mvn | count 8 2 3define i32 @f1() { 4entry: 5 ret i32 -1 6} 7 8define i32 @f2(i32 %a) { 9entry: 10 %tmpnot = xor i32 %a, -1 ; <i32> [#uses=1] 11 ret i32 %tmpnot 12} 13 14define i32 @f3(i32 %a) { 15entry: 16 %tmp1 = shl i32 %a, 2 ; <i32> [#uses=1] 17 %tmp1not = xor i32 %tmp1, -1 ; <i32> [#uses=1] 18 ret i32 %tmp1not 19} 20 21define i32 @f4(i32 %a, i8 %b) { 22entry: 23 %shift.upgrd.1 = zext i8 %b to i32 ; <i32> [#uses=1] 24 %tmp3 = shl i32 %a, %shift.upgrd.1 ; <i32> [#uses=1] 25 %tmp3not = xor i32 %tmp3, -1 ; <i32> [#uses=1] 26 ret i32 %tmp3not 27} 28 29define i32 @f5(i32 %a) { 30entry: 31 %tmp1 = lshr i32 %a, 2 ; <i32> [#uses=1] 32 %tmp1not = xor i32 %tmp1, -1 ; <i32> [#uses=1] 33 ret i32 %tmp1not 34} 35 36define i32 @f6(i32 %a, i8 %b) { 37entry: 38 %shift.upgrd.2 = zext i8 %b to i32 ; <i32> [#uses=1] 39 %tmp2 = lshr i32 %a, %shift.upgrd.2 ; <i32> [#uses=1] 40 %tmp2not = xor i32 %tmp2, -1 ; <i32> [#uses=1] 41 ret i32 %tmp2not 42} 43 44define i32 @f7(i32 %a) { 45entry: 46 %tmp1 = ashr i32 %a, 2 ; <i32> [#uses=1] 47 %tmp1not = xor i32 %tmp1, -1 ; <i32> [#uses=1] 48 ret i32 %tmp1not 49} 50 51define i32 @f8(i32 %a, i8 %b) { 52entry: 53 %shift.upgrd.3 = zext i8 %b to i32 ; <i32> [#uses=1] 54 %tmp3 = ashr i32 %a, %shift.upgrd.3 ; <i32> [#uses=1] 55 %tmp3not = xor i32 %tmp3, -1 ; <i32> [#uses=1] 56 ret i32 %tmp3not 57} 58 59define i32 @f9() { 60entry: 61 %tmp4845 = add i32 0, 0 ; <i32> [#uses=1] 62 br label %cond_true4848 63 64cond_true4848: ; preds = %entry 65 %tmp4851 = sub i32 -3, 0 ; <i32> [#uses=1] 66 %abc = add i32 %tmp4851, %tmp4845 ; <i32> [#uses=1] 67 ret i32 %abc 68} 69 70define i1 @f10(i32 %a) { 71entry: 72 %tmp102 = icmp eq i32 -2, %a ; <i1> [#uses=1] 73 ret i1 %tmp102 74} 75