1 2 /*--------------------------------------------------------------------*/ 3 /*--- Asm-only TransTab stuff. pub_core_transtab_asm.h ---*/ 4 /*--------------------------------------------------------------------*/ 5 6 /* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright (C) 2000-2017 Julian Seward 11 jseward@acm.org 12 13 This program is free software; you can redistribute it and/or 14 modify it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 2 of the 16 License, or (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, but 19 WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21 General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 26 02111-1307, USA. 27 28 The GNU General Public License is contained in the file COPYING. 29 */ 30 31 #ifndef __PUB_CORE_TRANSTAB_ASM_H 32 #define __PUB_CORE_TRANSTAB_ASM_H 33 34 /* Constants for the fast translation lookup cache. It is a direct 35 mapped cache, with 2^VG_TT_FAST_BITS entries. 36 37 On x86/amd64, the cache index is computed as 38 'address[VG_TT_FAST_BITS-1 : 0]'. 39 40 On ppc32/ppc64/mips32/mips64/arm64, the bottom two bits of 41 instruction addresses are zero, which means that function causes 42 only 1/4 of the entries to ever be used. So instead the function 43 is '(address >>u 2)[VG_TT_FAST_BITS-1 : 0]' on those targets. 44 45 On ARM we shift by 1, since Thumb insns can be of size 2, hence to 46 minimise collisions and maximise cache utilisation we need to take 47 into account all but the least significant bit. 48 49 On s390x the rightmost bit of an instruction address is zero. 50 For best table utilization shift the address to the right by 1 bit. */ 51 52 #define VG_TT_FAST_BITS 15 53 #define VG_TT_FAST_SIZE (1 << VG_TT_FAST_BITS) 54 #define VG_TT_FAST_MASK ((VG_TT_FAST_SIZE) - 1) 55 56 /* This macro isn't usable in asm land; nevertheless this seems 57 like a good place to put it. */ 58 59 #if defined(VGA_x86) || defined(VGA_amd64) 60 # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) ) & VG_TT_FAST_MASK) 61 62 #elif defined(VGA_s390x) || defined(VGA_arm) 63 # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 1) & VG_TT_FAST_MASK) 64 65 #elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le) \ 66 || defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_arm64) 67 # define VG_TT_FAST_HASH(_addr) ((((UWord)(_addr)) >> 2) & VG_TT_FAST_MASK) 68 69 #else 70 # error "VG_TT_FAST_HASH: unknown platform" 71 #endif 72 73 #endif // __PUB_CORE_TRANSTAB_ASM_H 74 75 /*--------------------------------------------------------------------*/ 76 /*--- end ---*/ 77 /*--------------------------------------------------------------------*/ 78