1 
2 /* To compile:
3    gcc -Wall -g -o crc32 none/tests/arm64/crc32.c -march=armv8-a+crc
4    -march=armv8-a+crc+crypto is also OK
5 */
6 
7 #include <stdio.h>
8 #include <malloc.h>  // memalign
9 #include <string.h>  // memset
10 #include <assert.h>
11 
12 typedef  unsigned char           UChar;
13 typedef  unsigned short int      UShort;
14 typedef  unsigned int            UInt;
15 typedef  signed int              Int;
16 typedef  unsigned char           UChar;
17 typedef  signed long long int    Long;
18 typedef  unsigned long long int  ULong;
19 
20 typedef  unsigned char           Bool;
21 #define False ((Bool)0)
22 #define True  ((Bool)1)
23 
24 
25 #define TESTINST3(instruction, RMval, RNval, RD, RM, RN, carryin) \
26 { \
27    ULong out; \
28    ULong nzcv_out; \
29    ULong nzcv_in = (carryin ? (1<<29) : 0); \
30    __asm__ __volatile__( \
31       "msr nzcv,%4;" \
32       "mov " #RM ",%2;" \
33       "mov " #RN ",%3;" \
34       instruction ";" \
35       "mov %0," #RD ";" \
36       "mrs %1,nzcv;" \
37       : "=&r" (out), "=&r" (nzcv_out) \
38       : "r" (RMval), "r" (RNval), "r" (nzcv_in) \
39       : #RD, #RM, #RN, "cc", "memory" \
40    ); \
41    printf("%s :: rd %016llx rm %016llx, rn %016llx, " \
42           "cin %d, nzcv %08llx %c%c%c%c\n",       \
43       instruction, out, ((ULong)RMval), ((ULong)RNval), \
44       carryin ? 1 : 0, \
45       nzcv_out & 0xffff0000, \
46       ((1<<31) & nzcv_out) ? 'N' : ' ', \
47       ((1<<30) & nzcv_out) ? 'Z' : ' ', \
48       ((1<<29) & nzcv_out) ? 'C' : ' ', \
49       ((1<<28) & nzcv_out) ? 'V' : ' ' \
50       ); \
51 }
52 
53 int main ( void )
54 {
55 ////////////////////////////////////////////////////////////////
56 printf("CRC32/CRC32C\n");
57 
58 TESTINST3("crc32b w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
59 TESTINST3("crc32b w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
60 TESTINST3("crc32b w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
61 TESTINST3("crc32b w21,w20,w19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
62 TESTINST3("crc32b w21,w20,w19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
63 TESTINST3("crc32b w21,w20,w19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
64 TESTINST3("crc32b w21,w20,w19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
65 
66 TESTINST3("crc32h w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
67 TESTINST3("crc32h w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
68 TESTINST3("crc32h w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
69 TESTINST3("crc32h w21,w20,w19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
70 TESTINST3("crc32h w21,w20,w19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
71 TESTINST3("crc32h w21,w20,w19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
72 TESTINST3("crc32h w21,w20,w19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
73 
74 TESTINST3("crc32w w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
75 TESTINST3("crc32w w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
76 TESTINST3("crc32w w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
77 TESTINST3("crc32w w21,w20,w19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
78 TESTINST3("crc32w w21,w20,w19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
79 TESTINST3("crc32w w21,w20,w19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
80 TESTINST3("crc32w w21,w20,w19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
81 
82 TESTINST3("crc32x w21,w20,x19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
83 TESTINST3("crc32x w21,w20,x19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
84 TESTINST3("crc32x w21,w20,x19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
85 TESTINST3("crc32x w21,w20,x19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
86 TESTINST3("crc32x w21,w20,x19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
87 TESTINST3("crc32x w21,w20,x19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
88 TESTINST3("crc32x w21,w20,x19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
89 
90 TESTINST3("crc32cb w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
91 TESTINST3("crc32cb w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
92 TESTINST3("crc32cb w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
93 TESTINST3("crc32cb w21,w20,w19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
94 TESTINST3("crc32cb w21,w20,w19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
95 TESTINST3("crc32cb w21,w20,w19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
96 TESTINST3("crc32cb w21,w20,w19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
97 
98 TESTINST3("crc32ch w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
99 TESTINST3("crc32ch w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
100 TESTINST3("crc32ch w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
101 TESTINST3("crc32ch w21,w20,w19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
102 TESTINST3("crc32ch w21,w20,w19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
103 TESTINST3("crc32ch w21,w20,w19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
104 TESTINST3("crc32ch w21,w20,w19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
105 
106 TESTINST3("crc32cw w21,w20,w19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
107 TESTINST3("crc32cw w21,w20,w19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
108 TESTINST3("crc32cw w21,w20,w19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
109 TESTINST3("crc32cw w21,w20,w19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
110 TESTINST3("crc32cw w21,w20,w19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
111 TESTINST3("crc32cw w21,w20,w19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
112 TESTINST3("crc32cw w21,w20,w19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
113 
114 TESTINST3("crc32cx w21,w20,x19", 0x4b154113f7d32514, 0xcce230caafbf9cc9, x21,x20,x19, 0);
115 TESTINST3("crc32cx w21,w20,x19", 0x33d5d595721d4f13, 0xf4509311f443a7ce, x21,x20,x19, 0);
116 TESTINST3("crc32cx w21,w20,x19", 0x4a3c6de6954cbc17, 0x111b21e39fbd7254, x21,x20,x19, 0);
117 TESTINST3("crc32cx w21,w20,x19", 0xfbb5c64ed1b044c6, 0x33ca4c4fb3960326, x21,x20,x19, 0);
118 TESTINST3("crc32cx w21,w20,x19", 0x2b7c5939d7c0f528, 0xb73870a5a6630162, x21,x20,x19, 0);
119 TESTINST3("crc32cx w21,w20,x19", 0x02fe41918ac5cdba, 0x48e0815289728f05, x21,x20,x19, 0);
120 TESTINST3("crc32cx w21,w20,x19", 0xb60a8f381f187bae, 0x008c208cc413ff72, x21,x20,x19, 0);
121 
122 return 0;
123 }
124