| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 284 const HexagonRegisterInfo &HRI) { in needsStackFrame()
405 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in findShrunkPrologEpilog() local
506 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in emitPrologue() local
559 auto &HRI = *HST.getRegisterInfo(); in insertPrologueInBlock() local
620 auto &HRI = *HST.getRegisterInfo(); in insertEpilogueInBlock() local
708 auto &HRI = *HST.getRegisterInfo(); in insertAllocframe() local
856 auto &HRI = *HST.getRegisterInfo(); in insertCFIInstructionsAt() local
967 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in hasFP() local
1083 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in getFrameIndexReference() local
1181 const CSIVect &CSI, const HexagonRegisterInfo &HRI, in insertCSRSpillsInBlock()
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| D | HexagonISelDAGToDAG.h | 34 const HexagonRegisterInfo *HRI; variable
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| D | HexagonVLIWPacketizer.h | 68 const HexagonRegisterInfo *HRI; variable
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| D | HexagonVExtract.cpp | 104 const auto &HRI = *HST->getRegisterInfo(); in runOnMachineFunction() local
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| D | HexagonBranchRelaxation.cpp | 70 const HexagonRegisterInfo *HRI; member
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| D | HexagonConstExtenders.cpp | 382 const HexagonRegisterInfo *HRI = nullptr; member
446 const HexagonRegisterInfo &HRI; member
462 const HexagonRegisterInfo &HRI; member
480 const HexagonRegisterInfo &HRI; member
495 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in operator <<() local
551 const HexagonRegisterInfo &HRI; member
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| D | HexagonInstrInfo.cpp | 127 static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI) { in isDblRegForSubInst()
739 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in reduceLoopCount() local
782 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in copyPhysReg() local
1016 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in expandPostRAPseudo() local
1568 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in DefinesPredicate() local
2037 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in isDependent() local
3671 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in getDuplexCandidateGroup() local
4043 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in getOperandLatency() local
4156 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in getMemAccessSize() local
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| D | HexagonBitSimplify.cpp | 441 auto &HRI = static_cast<const HexagonRegisterInfo&>( in parseRegSequence() local
905 auto &HRI = static_cast<const HexagonRegisterInfo&>( in getFinalVRegClass() local
1072 const HexagonRegisterInfo &HRI; member in __anonc8b4c70f0511::RedundantInstrElimination
1511 const HexagonRegisterInfo &HRI; member in __anonc8b4c70f0711::CopyGeneration
1531 const HexagonRegisterInfo &HRI; member in __anonc8b4c70f0711::CopyPropagation
1788 const HexagonRegisterInfo &HRI; member in __anonc8b4c70f0811::BitSimplification
2759 auto &HRI = *HST.getRegisterInfo(); in runOnMachineFunction() local
2896 const HexagonRegisterInfo *HRI = nullptr; member in __anonc8b4c70f0d11::HexagonLoopRescheduling
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| D | HexagonRDFOpt.cpp | 295 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction() local
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| D | HexagonBitTracker.cpp | 96 auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in mask() local
134 const auto &HRI = static_cast<const HexagonRegisterInfo&>(TRI); in composeWithSubRegIndex() local
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| D | HexagonISelLowering.cpp | 371 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerCall() local
576 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerINLINEASM() local
959 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerRETURNADDR() local
985 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerFRAMEADDR() local
1085 const auto &HRI = *Subtarget.getRegisterInfo(); in GetDynamicTLSAddr() local
1229 auto &HRI = *Subtarget.getRegisterInfo(); in HexagonTargetLowering() local
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| D | HexagonGenMux.cpp | 90 const HexagonRegisterInfo *HRI = nullptr; member in __anon548bd0170111::HexagonGenMux
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| D | HexagonAsmPrinter.cpp | 278 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in HexagonProcessInstruction() local
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| D | HexagonOptAddrMode.cpp | 84 const HexagonRegisterInfo *HRI = nullptr; member in __anon969503f60111::HexagonOptAddrMode
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| D | HexagonVLIWPacketizer.cpp | 114 const HexagonRegisterInfo *HRI; member in __anon46a22f770111::HexagonPacketizer
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.h | 41 const HexagonRegisterInfo *HRI; variable
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| D | HexagonFrameLowering.cpp | 242 const HexagonRegisterInfo &HRI) { in needsStackFrame()
346 auto &HRI = *HST.getRegisterInfo(); in findShrunkPrologEpilog() local
444 auto &HRI = *HST.getRegisterInfo(); in emitPrologue() local
500 auto &HRI = *HST.getRegisterInfo(); in insertPrologueInBlock() local
586 auto &HRI = *HST.getRegisterInfo(); in insertEpilogueInBlock() local
736 auto &HRI = *HST.getRegisterInfo(); in insertCFIInstructionsAt() local
845 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in hasFP() local
962 auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in getFrameIndexReference() local
1044 const CSIVect &CSI, const HexagonRegisterInfo &HRI, in insertCSRSpillsInBlock()
1207 const HexagonRegisterInfo &HRI, const TargetRegisterClass *RC) { in needToReserveScavengingSpillSlots()
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| D | HexagonBranchRelaxation.cpp | 58 const HexagonRegisterInfo *HRI; member
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| D | HexagonRDFOpt.cpp | 282 const auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction() local
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| D | HexagonInstrInfo.cpp | 114 static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI) { in isDblRegForSubInst()
764 auto &HRI = getRegisterInfo(); in copyPhysReg() local
988 const HexagonRegisterInfo &HRI = getRegisterInfo(); in expandPostRAPseudo() local
1421 auto &HRI = getRegisterInfo(); in DefinesPredicate() local
1970 auto &HRI = getRegisterInfo(); in isDependent() local
3639 auto &HRI = getRegisterInfo(); in getDuplexCandidateGroup() local
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| D | HexagonGenMux.cpp | 59 const HexagonRegisterInfo *HRI; member in __anondc5b75df0111::HexagonGenMux
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| D | HexagonISelLowering.cpp | 725 auto &HRI = *Subtarget.getRegisterInfo(); in LowerCall() local
1438 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerRETURNADDR() local
1464 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerFRAMEADDR() local
1706 auto &HRI = *Subtarget.getRegisterInfo(); in HexagonTargetLowering() local
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| D | HexagonVLIWPacketizer.cpp | 89 const HexagonRegisterInfo *HRI; member in __anon637f1d3f0111::HexagonPacketizer
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| D | HexagonISelDAGToDAG.cpp | 48 const HexagonRegisterInfo *HRI; member in __anon06b755f30111::HexagonDAGToDAGISel
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| D | HexagonBitSimplify.cpp | 2184 auto &HRI = *HST.getRegisterInfo(); in runOnMachineFunction() local
2315 const HexagonRegisterInfo *HRI; member in __anon3f9b49d70911::HexagonLoopRescheduling
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