/external/llvm/lib/Target/X86/ |
D | X86MCInstLower.cpp | 1467 const MachineOperand &SrcOp = MI->getOperand(SrcIdx); in EmitInstruction() local 1489 const MachineOperand &SrcOp = MI->getOperand(1); in EmitInstruction() local 1511 const MachineOperand &SrcOp = MI->getOperand(1); in EmitInstruction() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonRDFOpt.cpp | 139 const MachineOperand &SrcOp = MI->getOperand(1); in INITIALIZE_PASS_DEPENDENCY() local
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D | HexagonExpandCondsets.cpp | 623 MachineInstr *HexagonExpandCondsets::genCondTfrFor(MachineOperand &SrcOp, in genCondTfrFor()
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D | HexagonFrameLowering.cpp | 2221 MachineOperand &SrcOp = SI.getOperand(2); in optimizeSpillSlots() local
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRDFOpt.cpp | 123 const MachineOperand &SrcOp = MI->getOperand(1); in interpretAsCopy() local
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D | HexagonExpandCondsets.cpp | 611 MachineInstr *HexagonExpandCondsets::genCondTfrFor(MachineOperand &SrcOp, in genCondTfrFor()
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D | HexagonFrameLowering.cpp | 2108 MachineOperand &SrcOp = SI->getOperand(2); in optimizeSpillSlots() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SILowerControlFlow.cpp | 455 for (const auto &SrcOp : Def->explicit_operands()) in findMaskOperands() local
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
D | CodeGenInstruction.cpp | 237 std::pair<unsigned,unsigned> SrcOp = in ParseConstraint() local
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/external/llvm/utils/TableGen/ |
D | CodeGenInstruction.cpp | 244 std::pair<unsigned,unsigned> SrcOp = Ops.ParseOperandName(SrcOpName, false); in ParseConstraint() local
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/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | CodeGenInstruction.cpp | 245 std::pair<unsigned,unsigned> SrcOp = Ops.ParseOperandName(SrcOpName, false); in ParseConstraint() local
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/external/llvm/tools/llvm-c-test/ |
D | echo.cpp | 429 LLVMValueRef SrcOp = LLVMGetOperand(Src, 0); in CloneInstruction() local
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/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-c-test/ |
D | echo.cpp | 449 LLVMValueRef SrcOp = LLVMGetOperand(Src, 0); in CloneInstruction() local
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/external/llvm/lib/Linker/ |
D | IRMover.cpp | 1045 MDNode *SrcOp = SrcModFlags->getOperand(I); in linkModuleFlagsMetadata() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Linker/ |
D | IRMover.cpp | 1153 MDNode *SrcOp = SrcModFlags->getOperand(I); in linkModuleFlagsMetadata() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 552 for (SDValue SrcOp : Op->ops()) { in SimplifyDemandedBits() local 1432 SDValue SrcOp = Op.getOperand(i); in SimplifyDemandedVectorElts() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | MachineVerifier.cpp | 1045 const MachineOperand &SrcOp = MI->getOperand(1); in visitMachineInstrBefore() local
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D | MachineScheduler.cpp | 1672 const MachineOperand &SrcOp = Copy->getOperand(1); in constrainLocalCopy() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
D | InstCombineCasts.cpp | 1083 if (auto *SrcOp = dyn_cast<Instruction>(Src)) in visitZExt() local
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D | InstructionCombining.cpp | 1949 Value *SrcOp = BCI->getOperand(0); in visitGetElementPtrInst() local
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/external/swiftshader/third_party/LLVM/lib/Analysis/ |
D | InstructionSimplify.cpp | 1613 Value *SrcOp = LI->getOperand(0); in SimplifyICmpInst() local
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrInfo.cpp | 861 const MachineOperand &SrcOp = MI.getOperand(1); in expandPostRAPseudo() local
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/external/llvm/lib/CodeGen/ |
D | MachineScheduler.cpp | 1599 const MachineOperand &SrcOp = Copy->getOperand(1); in constrainLocalCopy() local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeDAG.cpp | 2025 SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp, in EmitStackConvert()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 5861 SDValue SrcOp = Op.getOperand(1); in computeKnownBitsForTargetNode() local 5883 SDValue SrcOp = Op.getOperand(0); in computeKnownBitsForTargetNode() local
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