Searched refs:AT91_SMC_TIMINGS_TCLR (Results 1 – 8 of 8) sorted by relevance
45 writel(AT91_SMC_TIMINGS_TCLR(3) | AT91_SMC_TIMINGS_TADL(10) | in sama5d3xek_nand_hw_init()77 writel(AT91_SMC_TIMINGS_TCLR(0) | AT91_SMC_TIMINGS_TADL(0) | in sama5d3xek_nor_hw_init()
45 #define AT91_SMC_TIMINGS_TCLR(x) (x & 0xf) macro
46 #define AT91_SMC_TIMINGS_TCLR(x) (x & 0xf) macro
41 writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) | in board_nand_hw_init()
37 writel(AT91_SMC_TIMINGS_TCLR(3) | AT91_SMC_TIMINGS_TADL(10) | in sama5d3_xplained_nand_hw_init()
43 writel(AT91_SMC_TIMINGS_TCLR(3) | AT91_SMC_TIMINGS_TADL(10) | in wb50n_nand_hw_init()
36 writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) | in sama5d4_xplained_nand_hw_init()
36 writel(AT91_SMC_TIMINGS_TCLR(2) | AT91_SMC_TIMINGS_TADL(7) | in sama5d4ek_nand_hw_init()