Searched refs:AnyALU (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600Schedule.td | 23 def AnyALU : InstrItinClass;
32 InstrItinData<AnyALU, [InstrStage<1, [ALU_X, ALU_Y, ALU_Z, ALU_W, TRANS]>]>,
44 InstrItinData<AnyALU, [InstrStage<1, [ALU_X, ALU_Y, ALU_Z, ALU_W]>]>,
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| D | R600MachineScheduler.h | 92 SUnit *PopInst(std::vector<SUnit*> &Q, bool AnyALU);
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| D | R600Instructions.td | 94 InstrItinClass itin = AnyALU> :
126 InstrItinClass itin = AnyALU> :
135 InstrItinClass itin = AnyALU> :
165 InstrItinClass itin = AnyALU> :
176 InstrItinClass itin = AnyALU> :
997 AnyALU> {
1301 [], AnyALU
1308 [], AnyALU
1605 AnyALU
1614 AnyALU
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| D | R600MachineScheduler.cpp | 319 SUnit *R600SchedStrategy::PopInst(std::vector<SUnit *> &Q, bool AnyALU) { in PopInst() argument
327 (!AnyALU || !TII->isVectorOnly(*SU->getInstr()))) { in PopInst()
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| D | EvergreenInstructions.td | 385 let Itinerary = AnyALU;
397 …uts), (ins), " GROUP_BARRIER", [(int_AMDGPU_barrier_local), (int_AMDGPU_barrier_global)], AnyALU>,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600Schedule.td | 23 def AnyALU : InstrItinClass;
32 InstrItinData<AnyALU, [InstrStage<1, [ALU_X, ALU_Y, ALU_Z, ALU_W, TRANS]>]>,
44 InstrItinData<AnyALU, [InstrStage<1, [ALU_X, ALU_Y, ALU_Z, ALU_W]>]>,
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| D | R600MachineScheduler.h | 90 SUnit *PopInst(std::vector<SUnit*> &Q, bool AnyALU);
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| D | R600MachineScheduler.cpp | 318 SUnit *R600SchedStrategy::PopInst(std::vector<SUnit *> &Q, bool AnyALU) { in PopInst() argument
326 (!AnyALU || !TII->isVectorOnly(*SU->getInstr()))) { in PopInst()
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| D | R600Instructions.td | 105 InstrItinClass itin = AnyALU> :
137 InstrItinClass itin = AnyALU> :
146 InstrItinClass itin = AnyALU> :
176 InstrItinClass itin = AnyALU> :
187 InstrItinClass itin = AnyALU> :
1027 AnyALU> {
1351 [], AnyALU
1358 [], AnyALU
1630 AnyALU
1639 AnyALU
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| D | EvergreenInstructions.td | 459 let Itinerary = AnyALU;
471 (outs), (ins), " GROUP_BARRIER", [(int_r600_group_barrier)], AnyALU>,
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