/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 230 Opc == Mips::BGEZ || Opc == Mips::BLTZ || Opc == Mips::BLEZ || in GetAnalyzableBrOpc() 246 case Mips::BGEZ : return Mips::BLTZ; in GetOppositeBranchOpc() 247 case Mips::BLTZ : return Mips::BGEZ; in GetOppositeBranchOpc()
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D | MipsInstrInfo.td | 733 def BLTZ : CBranchZero<0x01, 0, "bltz", setlt, CPURegs>;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/ |
D | branch-limits-int.mir | 213 ; MIPS: BLTZ $at, %bb.2, implicit-def $at { 232 ; PIC: BLTZ $at, %bb.3, implicit-def $at { 559 BLTZ killed renamable $at, %bb.2, implicit-def $at
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/external/llvm/lib/Target/Mips/ |
D | MipsSEInstrInfo.cpp | 413 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc() 414 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc() 510 Opc == Mips::BGEZ || Opc == Mips::BLTZ || Opc == Mips::BLEZ || in getAnalyzableBrOpc()
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D | MipsInstrInfo.cpp | 337 case Mips::BLTZ: in getEquivalentCompactForm()
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D | MipsInstrInfo.td | 1878 def BLTZ : MMRel, CBranchZero<"bltz", brtarget, setlt, GPR32Opnd>,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 297 case Mips::BLTZ: case Mips::BLTZ64: in isBranchOffsetInRange() 515 case Mips::BLTZ: in getEquivalentCompactForm()
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D | MipsSEInstrInfo.cpp | 495 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc() 496 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc() 647 Opc == Mips::BLTZ || Opc == Mips::BLEZ || Opc == Mips::BEQ64 || in getAnalyzableBrOpc()
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D | MipsScheduleP5600.td | 65 BGEZALL, BGEZL, BGTZ, BGTZL, BLEZ, BLEZL, BLTZ,
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D | MipsInstrInfo.td | 2236 def BLTZ : MMRel, CBranchZero<"bltz", brtarget, setlt, GPR32Opnd>,
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/external/v8/src/mips/ |
D | constants-mips.h | 579 BLTZ = ((0U << 3) + 0) << 16, enumerator 1881 case BLTZ: in IsForbiddenAfterBranchInstr()
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D | disasm-mips.cc | 1737 case BLTZ: in DecodeTypeImmediate()
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D | assembler-mips.cc | 534 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || in IsBranch() 1702 GenInstrImmediate(REGIMM, rs, BLTZ, offset); in bltz()
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D | simulator-mips.cc | 6458 case BLTZ: in DecodeTypeImmediate()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 606 BLTZ = ((0U << 3) + 0) << 16, enumerator 1964 case BLTZ: in IsForbiddenAfterBranchInstr()
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D | disasm-mips64.cc | 1939 case BLTZ: in DecodeTypeImmediateREGIMM()
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D | assembler-mips64.cc | 513 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || in IsBranch() 1682 GenInstrImmediate(REGIMM, rs, BLTZ, offset); in bltz()
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D | simulator-mips64.cc | 6697 case BLTZ: in DecodeTypeImmediate()
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeMIPS_common.c | 123 #define BLTZ (HI(1) | (0 << 16)) macro 1774 inst = BLTZ; in sljit_emit_cmp() 1788 inst = BLTZ; in sljit_emit_cmp()
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1548 case Mips::BLTZ: in processInstruction() 2847 ZeroTrgOpcode = Mips::BLTZ; in expandCondBranches() 2879 ZeroSrcOpcode = Mips::BLTZ; in expandCondBranches() 2893 TOut.emitRX(Mips::BLTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1849 case Mips::BLTZ: in processInstruction() 3757 ZeroTrgOpcode = Mips::BLTZ; in expandCondBranches() 3792 ZeroSrcOpcode = Mips::BLTZ; in expandCondBranches() 3806 TOut.emitRX(Mips::BLTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
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/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 260 25280U, // BLTZ 1974 0U, // BLTZ
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCCodeEmitter.inc | 775 UINT64_C(67108864), // BLTZ 5144 case Mips::BLTZ: 8501 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLTZ = 762
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D | MipsGenAsmWriter.inc | 1990 26185U, // BLTZ 4621 0U, // BLTZ
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D | MipsGenInstrInfo.inc | 777 BLTZ = 762, 4822 …::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo170, -1 ,nullptr }, // Inst #762 = BLTZ 10044 { Mips::BLTZ, Mips::BLTZ, Mips::BLTZ_MM },
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