Searched refs:CMGE (Results 1 – 12 of 12) sorted by relevance
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 126 CMGE, enumerator
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D | AArch64InstrInfo.td | 236 def AArch64cmge: SDNode<"AArch64ISD::CMGE", SDT_AArch64binvec>; 2771 defm CMGE : SIMDCmpTwoVector<1, 0b01000, "cmge", AArch64cmgez>; 2938 defm CMGE : SIMDThreeSameVector<0, 0b00111, "cmge", AArch64cmge>; 3245 defm CMGE : SIMDThreeScalarD<0, 0b00111, "cmge", AArch64cmge>; 3341 defm CMGE : SIMDCmpTwoScalarD< 1, 0b01000, "cmge", AArch64cmgez>;
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D | AArch64ISelLowering.cpp | 891 case AArch64ISD::CMGE: return "AArch64ISD::CMGE"; in getTargetNodeName() 6743 return DAG.getNode(AArch64ISD::CMGE, dl, VT, LHS, RHS); in EmitVectorComparison() 6751 return DAG.getNode(AArch64ISD::CMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 126 CMGE, enumerator
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D | AArch64InstrInfo.td | 267 def AArch64cmge: SDNode<"AArch64ISD::CMGE", SDT_AArch64binvec>; 3035 defm CMGE : SIMDCmpTwoVector<1, 0b01000, "cmge", AArch64cmgez>; 3202 defm CMGE : SIMDThreeSameVector<0, 0b00111, "cmge", AArch64cmge>; 3517 defm CMGE : SIMDThreeScalarD<0, 0b00111, "cmge", AArch64cmge>; 3618 defm CMGE : SIMDCmpTwoScalarD< 1, 0b01000, "cmge", AArch64cmgez>;
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D | AArch64ISelLowering.cpp | 1142 case AArch64ISD::CMGE: return "AArch64ISD::CMGE"; in getTargetNodeName() 7552 return DAG.getNode(AArch64ISD::CMGE, dl, VT, LHS, RHS); in EmitVectorComparison() 7560 return DAG.getNode(AArch64ISD::CMGE, dl, VT, RHS, LHS); in EmitVectorComparison()
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 1522 ### CMGE ### subsection 1529 ### CMGE ### subsection
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/external/clang/include/clang/Basic/ |
D | arm_neon.td | 1009 def CMGE : SInst<"vcgez", "ud", "csilfdQcQsQiQlQfQd">;
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenFastISel.inc | 4094 // FastEmit functions for AArch64ISD::CMGE. 7381 …case AArch64ISD::CMGE: return fastEmit_AArch64ISD_CMGE_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKil…
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D | AArch64GenAsmWriter.inc | 10246 // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE...
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D | AArch64GenDAGISel.inc | 46196 /* 89929*/ /*SwitchOpcode*/ 100, TARGET_VAL(AArch64ISD::CMGE),// ->90032
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/external/capstone/arch/AArch64/ |
D | AArch64GenAsmWriter.inc | 5558 // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE...
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