Searched refs:CMGT (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 127 CMGT, enumerator
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| D | AArch64InstrInfo.td | 237 def AArch64cmgt: SDNode<"AArch64ISD::CMGT", SDT_AArch64binvec>;
2772 defm CMGT : SIMDCmpTwoVector<0, 0b01000, "cmgt", AArch64cmgtz>;
2939 defm CMGT : SIMDThreeSameVector<0, 0b00110, "cmgt", AArch64cmgt>;
3246 defm CMGT : SIMDThreeScalarD<0, 0b00110, "cmgt", AArch64cmgt>;
3342 defm CMGT : SIMDCmpTwoScalarD< 0, 0b01000, "cmgt", AArch64cmgtz>;
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| D | AArch64ISelLowering.cpp | 892 case AArch64ISD::CMGT: return "AArch64ISD::CMGT"; in getTargetNodeName()
6747 return DAG.getNode(AArch64ISD::CMGT, dl, VT, LHS, RHS); in EmitVectorComparison()
6759 return DAG.getNode(AArch64ISD::CMGT, dl, VT, RHS, LHS); in EmitVectorComparison()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 127 CMGT, enumerator
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| D | AArch64InstrInfo.td | 268 def AArch64cmgt: SDNode<"AArch64ISD::CMGT", SDT_AArch64binvec>;
3036 defm CMGT : SIMDCmpTwoVector<0, 0b01000, "cmgt", AArch64cmgtz>;
3203 defm CMGT : SIMDThreeSameVector<0, 0b00110, "cmgt", AArch64cmgt>;
3518 defm CMGT : SIMDThreeScalarD<0, 0b00110, "cmgt", AArch64cmgt>;
3619 defm CMGT : SIMDCmpTwoScalarD< 0, 0b01000, "cmgt", AArch64cmgtz>;
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| D | AArch64ISelLowering.cpp | 1143 case AArch64ISD::CMGT: return "AArch64ISD::CMGT"; in getTargetNodeName()
7556 return DAG.getNode(AArch64ISD::CMGT, dl, VT, LHS, RHS); in EmitVectorComparison()
7568 return DAG.getNode(AArch64ISD::CMGT, dl, VT, RHS, LHS); in EmitVectorComparison()
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1536 ### CMGT ### subsection
1543 ### CMGT ### subsection
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| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 1011 def CMGT : SInst<"vcgtz", "ud", "csilfdQcQsQiQlQfQd">;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenFastISel.inc | 4182 // FastEmit functions for AArch64ISD::CMGT.
7382 …case AArch64ISD::CMGT: return fastEmit_AArch64ISD_CMGT_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKil…
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| D | AArch64GenDAGISel.inc | 46248 /* 90032*/ /*SwitchOpcode*/ 100, TARGET_VAL(AArch64ISD::CMGT),// ->90135
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