| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 227 unsigned FPDiff = TFI->hasFP(MF) ? 1 : 0; in getRegPressureLimit() local
232 return 4 - FPDiff; in getRegPressureLimit()
234 return 12 - FPDiff; in getRegPressureLimit()
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| D | X86ISelLowering.h | 1058 bool Is64Bit, int FPDiff,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 249 unsigned FPDiff = TFI->hasFP(MF) ? 1 : 0; in getRegPressureLimit() local
254 return 4 - FPDiff; in getRegPressureLimit()
256 return 12 - FPDiff; in getRegPressureLimit()
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| D | X86ISelLowering.h | 1190 bool Is64Bit, int FPDiff,
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| D | X86ISelLowering.cpp | 3392 bool Is64Bit, int FPDiff, const SDLoc &dl) const { in EmitTailCallLoadRetAddr() argument
3407 int FPDiff, const SDLoc &dl) { in EmitTailCallStoreRetAddr() argument
3409 if (!FPDiff) return Chain; in EmitTailCallStoreRetAddr()
3412 MF.getFrameInfo().CreateFixedObject(SlotSize, (int64_t)FPDiff - SlotSize, in EmitTailCallStoreRetAddr()
3534 int FPDiff = 0; in LowerCall() local
3539 FPDiff = NumBytesCallerPushed - NumBytes; in LowerCall()
3543 if (FPDiff < X86Info->getTCReturnAddrDelta()) in LowerCall()
3544 X86Info->setTCReturnAddrDelta(FPDiff); in LowerCall()
3569 if (isTailCall && FPDiff) in LowerCall()
3571 Is64Bit, FPDiff, dl); in LowerCall()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 322 unsigned FPDiff = TFI->hasFP(MF) ? 1 : 0; in getRegPressureLimit() local
327 return 4 - FPDiff; in getRegPressureLimit()
329 return 12 - FPDiff; in getRegPressureLimit()
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| D | X86ISelLowering.h | 783 int FPDiff, DebugLoc dl) const;
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| D | X86ISelLowering.cpp | 2003 int FPDiff, DebugLoc dl) const { in EmitTailCallLoadRetAddr() argument
2019 bool Is64Bit, int FPDiff, DebugLoc dl) { in EmitTailCallStoreRetAddr() argument
2021 if (!FPDiff) return Chain; in EmitTailCallStoreRetAddr()
2025 MF.getFrameInfo()->CreateFixedObject(SlotSize, FPDiff-SlotSize, false); in EmitTailCallStoreRetAddr()
2088 int FPDiff = 0; in LowerCall() local
2093 FPDiff = NumBytesCallerPushed - NumBytes; in LowerCall()
2097 if (FPDiff < (MF.getInfo<X86MachineFunctionInfo>()->getTCReturnAddrDelta())) in LowerCall()
2098 MF.getInfo<X86MachineFunctionInfo>()->setTCReturnAddrDelta(FPDiff); in LowerCall()
2106 if (isTailCall && FPDiff) in LowerCall()
2108 Is64Bit, FPDiff, dl); in LowerCall()
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 6092 def TCRETURNdi : Pseudo<(outs), (ins i64imm:$dst, i32imm:$FPDiff), []>,
6094 def TCRETURNri : Pseudo<(outs), (ins tcGPR64:$dst, i32imm:$FPDiff), []>,
6098 def : Pat<(AArch64tcret tcGPR64:$dst, (i32 timm:$FPDiff)),
6099 (TCRETURNri tcGPR64:$dst, imm:$FPDiff)>;
6100 def : Pat<(AArch64tcret tglobaladdr:$dst, (i32 timm:$FPDiff)),
6101 (TCRETURNdi texternalsym:$dst, imm:$FPDiff)>;
6102 def : Pat<(AArch64tcret texternalsym:$dst, (i32 timm:$FPDiff)),
6103 (TCRETURNdi texternalsym:$dst, imm:$FPDiff)>;
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| D | AArch64ISelLowering.cpp | 3013 int FPDiff = 0; in LowerCall() local
3025 FPDiff = NumReusableBytes - NumBytes; in LowerCall()
3032 assert(FPDiff % 16 == 0 && "unaligned stack on tail call"); in LowerCall()
3116 Offset = Offset + FPDiff; in LowerCall()
3219 Ops.push_back(DAG.getTargetConstant(FPDiff, DL, MVT::i32)); in LowerCall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 6480 def TCRETURNdi : Pseudo<(outs), (ins i64imm:$dst, i32imm:$FPDiff), []>,
6482 def TCRETURNri : Pseudo<(outs), (ins tcGPR64:$dst, i32imm:$FPDiff), []>,
6486 def : Pat<(AArch64tcret tcGPR64:$dst, (i32 timm:$FPDiff)),
6487 (TCRETURNri tcGPR64:$dst, imm:$FPDiff)>;
6488 def : Pat<(AArch64tcret tglobaladdr:$dst, (i32 timm:$FPDiff)),
6489 (TCRETURNdi texternalsym:$dst, imm:$FPDiff)>;
6490 def : Pat<(AArch64tcret texternalsym:$dst, (i32 timm:$FPDiff)),
6491 (TCRETURNdi texternalsym:$dst, imm:$FPDiff)>;
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| D | AArch64ISelLowering.cpp | 3535 int FPDiff = 0; in LowerCall() local
3547 FPDiff = NumReusableBytes - NumBytes; in LowerCall()
3554 assert(FPDiff % 16 == 0 && "unaligned stack on tail call"); in LowerCall()
3637 Offset = Offset + FPDiff; in LowerCall()
3739 Ops.push_back(DAG.getTargetConstant(FPDiff, DL, MVT::i32)); in LowerCall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2501 int32_t FPDiff = 0; in LowerCall() local
2586 Offset = Offset + FPDiff; in LowerCall()
2675 Ops.push_back(DAG.getTargetConstant(FPDiff, DL, MVT::i32)); in LowerCall()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenDAGISel.inc | 29430 /* 56385*/ OPC_RecordChild2, // #2 = $FPDiff
29439 …// Src: (AArch64tcret (tglobaladdr:{ *:[iPTR] }):$dst, (timm:{ *:[i32] }):$FPDiff) - Complexity = 9
29440 // Dst: (TCRETURNdi (texternalsym:{ *:[i64] }):$dst, (imm:{ *:[i32] }):$FPDiff)
29443 /* 56407*/ OPC_RecordChild2, // #2 = $FPDiff
29452 …/ Src: (AArch64tcret (texternalsym:{ *:[iPTR] }):$dst, (timm:{ *:[i32] }):$FPDiff) - Complexity = 9
29453 // Dst: (TCRETURNdi (texternalsym:{ *:[i64] }):$dst, (imm:{ *:[i32] }):$FPDiff)
29457 /* 56429*/ OPC_RecordChild2, // #2 = $FPDiff
29466 … // Src: (AArch64tcret tcGPR64:{ *:[i64] }:$dst, (timm:{ *:[i32] }):$FPDiff) - Complexity = 6
29467 // Dst: (TCRETURNri tcGPR64:{ *:[i64] }:$dst, (imm:{ *:[i32] }):$FPDiff)
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