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Searched refs:FRECPE (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h191 FRECPE, enumerator
DAArch64ISelLowering.cpp957 case AArch64ISD::FRECPE: return "AArch64ISD::FRECPE"; in getTargetNodeName()
4570 RecipOp = Opcode == (AArch64ISD::FRECPE) ? "div": "sqrt"; in getEstimate()
4584 return getEstimate(*Subtarget, DCI, AArch64ISD::FRECPE, Operand, ExtraSteps); in getRecipEstimate()
DAArch64InstrInfo.td289 def AArch64frecpe : SDNode<"AArch64ISD::FRECPE", SDTFPUnaryOp>;
2835 defm FRECPE : SIMDTwoVectorFP<0, 1, 0b11101, "frecpe", int_aarch64_neon_frecpe>;
3361 defm FRECPE : SIMDFPTwoScalar< 0, 1, 0b11101, "frecpe">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h191 FRECPE, FRECPS, enumerator
DAArch64InstrInfo.td320 def AArch64frecpe : SDNode<"AArch64ISD::FRECPE", SDTFPUnaryOp>;
3099 defm FRECPE : SIMDTwoVectorFP<0, 1, 0b11101, "frecpe", int_aarch64_neon_frecpe>;
3638 defm FRECPE : SIMDFPTwoScalar< 0, 1, 0b11101, "frecpe">;
DAArch64ISelLowering.cpp1207 case AArch64ISD::FRECPE: return "AArch64ISD::FRECPE"; in getTargetNodeName()
5320 if (SDValue Estimate = getEstimate(Subtarget, AArch64ISD::FRECPE, Operand, in getRecipEstimate()
/external/vixl/src/aarch64/
Ddisasm-aarch64.cc2489 FORMAT(FRECPE, "frecpe") in VisitNEON2RegMiscFP16()
3973 FORMAT(FRECPE, "frecpe") in VisitNEONScalar2RegMiscFP16()
/external/clang/include/clang/Basic/
Darm_neon.td956 def FRECPE : SInst<"vrecpe", "dd", "dQd">;
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md2296 ### FRECPE ### subsection
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenFastISel.inc987 // FastEmit functions for AArch64ISD::FRECPE.
3970 case AArch64ISD::FRECPE: return fastEmit_AArch64ISD_FRECPE_r(VT, RetVT, Op0, Op0IsKill);
DAArch64GenDAGISel.inc40187 /* 77260*/ /*SwitchOpcode*/ 57, TARGET_VAL(AArch64ISD::FRECPE),// ->77320