| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ProcessImplicitDefs.cpp | 65 MachineOperand &MO0 = MI->getOperand(0); in isUndefCopy() local
69 if (!MO0.getSubReg() || ImpDefRegs.count(MO0.getReg())) in isUndefCopy()
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| D | TailDuplication.cpp | 462 MachineOperand &MO0 = II->getOperand(Idx); in UpdateSuccessorsPHIs() local
463 unsigned Reg = MO0.getReg(); in UpdateSuccessorsPHIs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 1738 const MachineOperand &MO0 = Phi.getOperand(I); in checkPHIOps() local
1739 if (!MO0.isReg()) { in checkPHIOps()
1740 report("Expected PHI operand to be a register", &MO0, I); in checkPHIOps()
1743 if (MO0.isImplicit() || MO0.isInternalRead() || MO0.isEarlyClobber() || in checkPHIOps()
1744 MO0.isDebug() || MO0.isTied()) in checkPHIOps()
1745 report("Unexpected flag on PHI operand", &MO0, I); in checkPHIOps()
1762 if (!MO0.isUndef() && PrInfo.reachable && in checkPHIOps()
1763 !PrInfo.isLiveOut(MO0.getReg())) in checkPHIOps()
1764 report("PHI operand is not live-out from predecessor", &MO0, I); in checkPHIOps()
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| D | MachineRegisterInfo.cpp | 232 MachineOperand *MO0 = &MI->getOperand(0); in verifyUseList() local
234 if (!(MO >= MO0 && MO < MO0+NumOps)) { in verifyUseList()
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| D | TailDuplicator.cpp | 480 MachineOperand &MO0 = MI.getOperand(Idx); in updateSuccessorsPHIs() local
481 unsigned Reg = MO0.getReg(); in updateSuccessorsPHIs()
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| /external/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 165 MachineOperand *MO0 = &MI->getOperand(0); in verifyUseList() local
167 if (!(MO >= MO0 && MO < MO0+NumOps)) { in verifyUseList()
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| D | TailDuplicator.cpp | 443 MachineOperand &MO0 = II->getOperand(Idx); in updateSuccessorsPHIs() local
444 unsigned Reg = MO0.getReg(); in updateSuccessorsPHIs()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCodeEmitter.cpp | 685 const MachineOperand &MO0 = MI.getOperand(0); in emitMOVi32immInstruction() local
697 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi32immInstruction()
712 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi32immInstruction()
721 const MachineOperand &MO0 = MI.getOperand(0); in emitMOVi2piecesInstruction() local
735 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi2piecesInstruction()
750 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi2piecesInstruction()
753 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRnShift; in emitMOVi2piecesInstruction()
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| D | ARMBaseInstrInfo.cpp | 1181 const MachineOperand &MO0 = MI0->getOperand(1); in produceSameValue() local
1183 if (MO0.getOffset() != MO1.getOffset()) in produceSameValue()
1192 return MO0.getGlobal() == MO1.getGlobal(); in produceSameValue()
1196 int CPI0 = MO0.getIndex(); in produceSameValue()
1237 const MachineOperand &MO0 = MI0->getOperand(i); in produceSameValue() local
1239 if (!MO0.isIdenticalTo(MO1)) in produceSameValue()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1321 const MachineOperand &MO0 = MI->getOperand(0); in handleSpecialFP() local
1322 unsigned DstST = MO0.getReg() - X86::ST0; in handleSpecialFP()
1330 assert(!MO0.isDead() && "Cannot copy to dead ST register"); in handleSpecialFP()
1360 unsigned DstFP = getFPReg(MO0); in handleSpecialFP()
1380 unsigned DstFP = getFPReg(MO0); in handleSpecialFP()
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| D | X86InstrInfo.cpp | 2972 MachineOperand &MO0 = DataMI->getOperand(0); in unfoldMemoryOperand() local
2986 MO1.ChangeToRegister(MO0.getReg(), false); in unfoldMemoryOperand()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1469 const MachineOperand &MO0 = MI0.getOperand(1); in produceSameValue() local
1471 if (MO0.getOffset() != MO1.getOffset()) in produceSameValue()
1481 return MO0.getGlobal() == MO1.getGlobal(); in produceSameValue()
1485 int CPI0 = MO0.getIndex(); in produceSameValue()
1526 const MachineOperand &MO0 = MI0.getOperand(i); in produceSameValue() local
1528 if (!MO0.isIdenticalTo(MO1)) in produceSameValue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1448 const MachineOperand &MO0 = MI.getOperand(0); in handleSpecialFP() local
1452 unsigned DstFP = getFPReg(MO0); in handleSpecialFP()
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| D | X86InstrInfo.cpp | 5443 MachineOperand &MO0 = DataMI->getOperand(0); in unfoldMemoryOperand() local
5458 MO1.ChangeToRegister(MO0.getReg(), false); in unfoldMemoryOperand()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1400 const MachineOperand &MO0 = MI.getOperand(0); in handleSpecialFP() local
1404 unsigned DstFP = getFPReg(MO0); in handleSpecialFP()
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| D | X86InstrInfo.cpp | 6451 MachineOperand &MO0 = DataMI->getOperand(0); in unfoldMemoryOperand() local
6466 MO1.ChangeToRegister(MO0.getReg(), false); in unfoldMemoryOperand()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1647 const MachineOperand &MO0 = MI0.getOperand(1); in produceSameValue() local
1649 if (MO0.getOffset() != MO1.getOffset()) in produceSameValue()
1659 return MO0.getGlobal() == MO1.getGlobal(); in produceSameValue()
1663 int CPI0 = MO0.getIndex(); in produceSameValue()
1704 const MachineOperand &MO0 = MI0.getOperand(i); in produceSameValue() local
1706 if (!MO0.isIdenticalTo(MO1)) in produceSameValue()
|
| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | 5ac996071d3224c110eb04d98eecbbd0.000127e1.honggfuzz.cov | 437 ���Ej��M�b��]�L'KS�dە �MO0.��x&��r�T ����[]��#�|��m������ �[�)�A�U�ӽ�j�h-�h���,/[͒�,>fD'��…
|
| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 5ac996071d3224c110eb04d98eecbbd0.000127e1.honggfuzz.cov | 437 ���Ej��M�b��]�L'KS�dە �MO0.��x&��r�T ����[]��#�|��m������ �[�)�A�U�ӽ�j�h-�h���,/[͒�,>fD'��…
|
| D | d498fd2061b7e0553648fdd5a70556fb.0001eed0.honggfuzz.cov | 340 ���Ej��M�b��]�L'KS�dە �MO0.��x&��r�T ����[]��#�|��m������ �[�)�A�U�ӽ�j�h-�h���,/[͒�,>fD'��…
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