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Searched refs:MRMDestReg (Results 1 – 25 of 48) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrVMX.td42 def VMREAD64rr : I<0x78, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
46 def VMREAD32rr : I<0x78, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
DX86InstrInfo.td845 def MOV8rr : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src),
847 def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src),
849 def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
851 def MOV64rr : RI<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
966 def MOV8rr_NOREX : I<0x88, MRMDestReg,
992 def BT16rr : I<0xA3, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2),
995 def BT32rr : I<0xA3, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2),
998 def BT64rr : RI<0xA3, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2),
1054 def BTC16rr : I<0xBB, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2),
1056 def BTC32rr : I<0xBB, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2),
[all …]
DX86InstrSystem.td115 def MOV32rd : I<0x21, MRMDestReg, (outs GR32:$dst), (ins DEBUG_REG:$src),
117 def MOV64rd : I<0x21, MRMDestReg, (outs GR64:$dst), (ins DEBUG_REG:$src),
128 def MOV32rc : I<0x20, MRMDestReg, (outs GR32:$dst), (ins CONTROL_REG:$src),
130 def MOV64rc : I<0x20, MRMDestReg, (outs GR64:$dst), (ins CONTROL_REG:$src),
153 def MOV16rs : I<0x8C, MRMDestReg, (outs GR16:$dst), (ins SEGMENT_REG:$src),
155 def MOV32rs : I<0x8C, MRMDestReg, (outs GR32:$dst), (ins SEGMENT_REG:$src),
157 def MOV64rs : RI<0x8C, MRMDestReg, (outs GR64:$dst), (ins SEGMENT_REG:$src),
DX86InstrShiftRotate.td601 def SHLD16rrCL : I<0xA5, MRMDestReg, (outs GR16:$dst),
606 def SHRD16rrCL : I<0xAD, MRMDestReg, (outs GR16:$dst),
611 def SHLD32rrCL : I<0xA5, MRMDestReg, (outs GR32:$dst),
615 def SHRD32rrCL : I<0xAD, MRMDestReg, (outs GR32:$dst),
619 def SHLD64rrCL : RI<0xA5, MRMDestReg, (outs GR64:$dst),
624 def SHRD64rrCL : RI<0xAD, MRMDestReg, (outs GR64:$dst),
632 def SHLD16rri8 : Ii8<0xA4, MRMDestReg,
639 def SHRD16rri8 : Ii8<0xAC, MRMDestReg,
646 def SHLD32rri8 : Ii8<0xA4, MRMDestReg,
653 def SHRD32rri8 : Ii8<0xAC, MRMDestReg,
[all …]
/external/swiftshader/third_party/LLVM/test/TableGen/
DTargetInstrInfo.td49 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
88 "mov $dst, $src", 0x88, MRMDestReg,
102 "and $dst, $src2", 0x20, MRMDestReg,
/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/
DTargetInstrInfo.td49 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
88 "mov $dst, $src", 0x88, MRMDestReg,
102 "and $dst, $src2", 0x20, MRMDestReg,
/external/llvm/test/TableGen/
DTargetInstrInfo.td49 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
88 "mov $dst, $src", 0x88, MRMDestReg,
102 "and $dst, $src2", 0x20, MRMDestReg,
/external/llvm/lib/Target/X86/
DX86InstrVMX.td48 def VMREAD64rr : I<0x78, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
52 def VMREAD32rr : I<0x78, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
DX86InstrShiftRotate.td691 def SHLD16rrCL : I<0xA5, MRMDestReg, (outs GR16:$dst),
697 def SHRD16rrCL : I<0xAD, MRMDestReg, (outs GR16:$dst),
703 def SHLD32rrCL : I<0xA5, MRMDestReg, (outs GR32:$dst),
708 def SHRD32rrCL : I<0xAD, MRMDestReg, (outs GR32:$dst),
713 def SHLD64rrCL : RI<0xA5, MRMDestReg, (outs GR64:$dst),
719 def SHRD64rrCL : RI<0xAD, MRMDestReg, (outs GR64:$dst),
728 def SHLD16rri8 : Ii8<0xA4, MRMDestReg,
735 def SHRD16rri8 : Ii8<0xAC, MRMDestReg,
742 def SHLD32rri8 : Ii8<0xA4, MRMDestReg,
749 def SHRD32rri8 : Ii8<0xAC, MRMDestReg,
[all …]
DX86InstrSystem.td120 def MOV32rd : I<0x21, MRMDestReg, (outs GR32:$dst), (ins DEBUG_REG:$src),
123 def MOV64rd : I<0x21, MRMDestReg, (outs GR64:$dst), (ins DEBUG_REG:$src),
139 def MOV32rc : I<0x20, MRMDestReg, (outs GR32:$dst), (ins CONTROL_REG:$src),
142 def MOV64rc : I<0x20, MRMDestReg, (outs GR64:$dst), (ins CONTROL_REG:$src),
170 def MOV16rs : I<0x8C, MRMDestReg, (outs GR16:$dst), (ins SEGMENT_REG:$src),
172 def MOV32rs : I<0x8C, MRMDestReg, (outs GR32:$dst), (ins SEGMENT_REG:$src),
174 def MOV64rs : RI<0x8C, MRMDestReg, (outs GR64:$dst), (ins SEGMENT_REG:$src),
DX86InstrInfo.td1359 def MOV8rr : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src),
1361 def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src),
1363 def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
1365 def MOV64rr : RI<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
1563 def MOV8rr_NOREX : I<0x88, MRMDestReg,
1598 def BT16rr : I<0xA3, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2),
1602 def BT32rr : I<0xA3, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2),
1606 def BT64rr : RI<0xA3, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2),
1672 def BTC16rr : I<0xBB, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2),
1675 def BTC32rr : I<0xBB, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2),
[all …]
DX86InstrMPX.td55 def BNDMOVMRrr : I<0x1B, MRMDestReg, (outs BNDR:$dst), (ins BNDR:$src),
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrVMX.td52 def VMREAD64rr : I<0x78, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
55 def VMREAD32rr : I<0x78, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
DX86InstrShiftRotate.td656 def SHLD16rrCL : I<0xA5, MRMDestReg, (outs GR16:$dst),
661 def SHRD16rrCL : I<0xAD, MRMDestReg, (outs GR16:$dst),
666 def SHLD32rrCL : I<0xA5, MRMDestReg, (outs GR32:$dst),
671 def SHRD32rrCL : I<0xAD, MRMDestReg, (outs GR32:$dst),
676 def SHLD64rrCL : RI<0xA5, MRMDestReg, (outs GR64:$dst),
681 def SHRD64rrCL : RI<0xAD, MRMDestReg, (outs GR64:$dst),
689 def SHLD16rri8 : Ii8<0xA4, MRMDestReg,
696 def SHRD16rri8 : Ii8<0xAC, MRMDestReg,
703 def SHLD32rri8 : Ii8<0xA4, MRMDestReg,
710 def SHRD32rri8 : Ii8<0xAC, MRMDestReg,
[all …]
DX86InstrSystem.td115 def MOV32rd : I<0x21, MRMDestReg, (outs GR32:$dst), (ins DEBUG_REG:$src),
118 def MOV64rd : I<0x21, MRMDestReg, (outs GR64:$dst), (ins DEBUG_REG:$src),
134 def MOV32rc : I<0x20, MRMDestReg, (outs GR32:$dst), (ins CONTROL_REG:$src),
137 def MOV64rc : I<0x20, MRMDestReg, (outs GR64:$dst), (ins CONTROL_REG:$src),
166 def MOV16rs : I<0x8C, MRMDestReg, (outs GR16:$dst), (ins SEGMENT_REG:$src),
168 def MOV32rs : I<0x8C, MRMDestReg, (outs GR32:$dst), (ins SEGMENT_REG:$src),
170 def MOV64rs : RI<0x8C, MRMDestReg, (outs GR64:$dst), (ins SEGMENT_REG:$src),
DX86InstrInfo.td1484 def MOV8rr : I<0x88, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src),
1486 def MOV16rr : I<0x89, MRMDestReg, (outs GR16:$dst), (ins GR16:$src),
1488 def MOV32rr : I<0x89, MRMDestReg, (outs GR32:$dst), (ins GR32:$src),
1490 def MOV64rr : RI<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
1720 def MOV8rr_NOREX : I<0x88, MRMDestReg,
1754 def BT16rr : I<0xA3, MRMDestReg, (outs), (ins GR16:$src1, GR16:$src2),
1758 def BT32rr : I<0xA3, MRMDestReg, (outs), (ins GR32:$src1, GR32:$src2),
1762 def BT64rr : RI<0xA3, MRMDestReg, (outs), (ins GR64:$src1, GR64:$src2),
1822 def BTC16rr : I<0xBB, MRMDestReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
1825 def BTC32rr : I<0xBB, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
[all …]
DX86InstrMPX.td61 def BNDMOVrr_REV : I<0x1B, MRMDestReg, (outs BNDR:$dst), (ins BNDR:$src),
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h192 MRMDestReg = 3, enumerator
472 case X86II::MRMDestReg: in getMemoryOperandNo()
/external/swiftshader/third_party/LLVM/utils/TableGen/
DX86RecognizableInstr.cpp47 MRMDestReg = 3, enumerator
133 if (form == X86Local::MRMDestReg || in needsModRMForDecode()
151 if (form == X86Local::MRMDestReg || in isRegFormat()
638 case X86Local::MRMDestReg: in emitInstructionSpecifier()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h240 MRMDestReg = 3, enumerator
669 case X86II::MRMDestReg: in getMemoryOperandNo()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h320 MRMDestReg = 48, enumerator
722 case X86II::MRMDestReg: in getMemoryOperandNo()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp97 MRMDestReg = 3, enumerator
148 return (form == X86Local::MRMDestReg || in isRegFormat()
604 case X86Local::MRMDestReg: in emitInstructionSpecifier()
847 case X86Local::MRMDestReg: case X86Local::MRMDestMem: in emitDecodePath()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DX86RecognizableInstr.h112 MRMDestReg = 48, enumerator
DX86FoldTablesEmitter.cpp262 return FormBitsNum >= X86Local::MRMDestReg && FormBitsNum <= X86Local::MRM7r; in hasRegisterFormat()
425 RegFormNum == X86Local::MRMDestReg) || in areOppositeForms()
DX86RecognizableInstr.cpp104 (Form == X86Local::MRMDestReg || Form == X86Local::MRMSrcReg); in RecognizableInstr()
499 case X86Local::MRMDestReg: in emitInstructionSpecifier()
729 case X86Local::MRMDestReg: in emitDecodePath()

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