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Searched refs:OutVT (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp42 EVT OutVT = N->getValueType(0); in ExpandRes_BITCAST() local
43 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in ExpandRes_BITCAST()
73 TLI.hasBigEndianPartOrdering(OutVT, DL)) in ExpandRes_BITCAST()
81 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) in ExpandRes_BITCAST()
98 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) in ExpandRes_BITCAST()
106 if (InVT.isVector() && OutVT.isInteger()) { in ExpandRes_BITCAST()
192 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) in ExpandRes_BITCAST()
DLegalizeIntegerTypes.cpp253 EVT OutVT = N->getValueType(0); in PromoteIntRes_BITCAST() local
254 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in PromoteIntRes_BITCAST()
309 CreateStackStoreLoad(InOp, OutVT)); in PromoteIntRes_BITCAST()
367 EVT OutVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_CONVERT_RNDSAT() local
368 return DAG.getConvertRndSat(OutVT, SDLoc(N), N->getOperand(0), in PromoteIntRes_CONVERT_RNDSAT()
3223 EVT OutVT = N->getValueType(0); in PromoteIntRes_EXTRACT_SUBVECTOR() local
3224 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in PromoteIntRes_EXTRACT_SUBVECTOR()
3226 unsigned OutNumElems = OutVT.getVectorNumElements(); in PromoteIntRes_EXTRACT_SUBVECTOR()
3260 EVT OutVT = V0.getValueType(); in PromoteIntRes_VECTOR_SHUFFLE() local
3262 return DAG.getVectorShuffle(OutVT, dl, V0, V1, NewMask); in PromoteIntRes_VECTOR_SHUFFLE()
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DLegalizeVectorTypes.cpp1568 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), in SplitVecOp_UnaryOp() local
1571 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo); in SplitVecOp_UnaryOp()
1572 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi); in SplitVecOp_UnaryOp()
1946 EVT OutVT = N->getValueType(0); in SplitVecOp_TruncateHelper() local
1947 unsigned NumElements = OutVT.getVectorNumElements(); in SplitVecOp_TruncateHelper()
1948 bool IsFloat = OutVT.isFloatingPoint(); in SplitVecOp_TruncateHelper()
1955 unsigned OutElementSize = OutVT.getVectorElementType().getSizeInBits(); in SplitVecOp_TruncateHelper()
1984 ? DAG.getNode(ISD::FP_ROUND, DL, OutVT, InterVec, in SplitVecOp_TruncateHelper()
1987 : DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec); in SplitVecOp_TruncateHelper()
2018 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), in SplitVecOp_FP_ROUND() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp42 EVT OutVT = N->getValueType(0); in ExpandRes_BITCAST() local
43 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in ExpandRes_BITCAST()
73 TLI.hasBigEndianPartOrdering(OutVT, DL)) in ExpandRes_BITCAST()
81 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) in ExpandRes_BITCAST()
98 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) in ExpandRes_BITCAST()
106 if (InVT.isVector() && OutVT.isInteger()) { in ExpandRes_BITCAST()
189 if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout())) in ExpandRes_BITCAST()
DLegalizeIntegerTypes.cpp255 EVT OutVT = N->getValueType(0); in PromoteIntRes_BITCAST() local
256 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in PromoteIntRes_BITCAST()
311 CreateStackStoreLoad(InOp, OutVT)); in PromoteIntRes_BITCAST()
3374 EVT OutVT = N->getValueType(0); in PromoteIntRes_EXTRACT_SUBVECTOR() local
3375 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in PromoteIntRes_EXTRACT_SUBVECTOR()
3377 unsigned OutNumElems = OutVT.getVectorNumElements(); in PromoteIntRes_EXTRACT_SUBVECTOR()
3411 EVT OutVT = V0.getValueType(); in PromoteIntRes_VECTOR_SHUFFLE() local
3413 return DAG.getVectorShuffle(OutVT, dl, V0, V1, NewMask); in PromoteIntRes_VECTOR_SHUFFLE()
3418 EVT OutVT = N->getValueType(0); in PromoteIntRes_BUILD_VECTOR() local
3419 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in PromoteIntRes_BUILD_VECTOR()
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DLegalizeVectorTypes.cpp1772 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), in SplitVecOp_UnaryOp() local
1775 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo); in SplitVecOp_UnaryOp()
1776 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi); in SplitVecOp_UnaryOp()
2156 EVT OutVT = N->getValueType(0); in SplitVecOp_TruncateHelper() local
2157 unsigned NumElements = OutVT.getVectorNumElements(); in SplitVecOp_TruncateHelper()
2158 bool IsFloat = OutVT.isFloatingPoint(); in SplitVecOp_TruncateHelper()
2165 unsigned OutElementSize = OutVT.getScalarSizeInBits(); in SplitVecOp_TruncateHelper()
2194 ? DAG.getNode(ISD::FP_ROUND, DL, OutVT, InterVec, in SplitVecOp_TruncateHelper()
2197 : DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec); in SplitVecOp_TruncateHelper()
2228 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), in SplitVecOp_FP_ROUND() local
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DDAGCombiner.cpp16725 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), OutSVT, NumElts / Scale); in combineShuffleToVectorExtend() local
16726 if (!LegalTypes || TLI.isTypeLegal(OutVT)) in combineShuffleToVectorExtend()
16728 TLI.isOperationLegalOrCustom(ISD::ANY_EXTEND_VECTOR_INREG, OutVT)) in combineShuffleToVectorExtend()
16730 DAG.getAnyExtendVectorInReg(N0, SDLoc(SVN), OutVT)); in combineShuffleToVectorExtend()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp209 EVT OutVT = N->getValueType(0); in PromoteIntRes_BITCAST() local
210 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in PromoteIntRes_BITCAST()
254 if (OutVT.bitsEq(NInVT)) in PromoteIntRes_BITCAST()
256 return DAG.getNode(ISD::BITCAST, dl, OutVT, GetWidenedVector(InOp)); in PromoteIntRes_BITCAST()
260 CreateStackStoreLoad(InOp, OutVT)); in PromoteIntRes_BITCAST()
303 EVT OutVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_CONVERT_RNDSAT() local
304 return DAG.getConvertRndSat(OutVT, N->getDebugLoc(), N->getOperand(0), in PromoteIntRes_CONVERT_RNDSAT()
2843 EVT OutVT = N->getValueType(0); in PromoteIntRes_EXTRACT_SUBVECTOR() local
2844 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in PromoteIntRes_EXTRACT_SUBVECTOR()
2846 unsigned OutNumElems = OutVT.getVectorNumElements(); in PromoteIntRes_EXTRACT_SUBVECTOR()
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DLegalizeTypesGeneric.cpp41 EVT OutVT = N->getValueType(0); in ExpandRes_BITCAST() local
42 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); in ExpandRes_BITCAST()
97 if (InVT.isVector() && OutVT.isInteger()) { in ExpandRes_BITCAST()
DLegalizeVectorTypes.cpp1022 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), in SplitVecOp_UnaryOp() local
1025 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo); in SplitVecOp_UnaryOp()
1026 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi); in SplitVecOp_UnaryOp()
1197 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(), in SplitVecOp_FP_ROUND() local
1200 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1)); in SplitVecOp_FP_ROUND()
1201 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1)); in SplitVecOp_FP_ROUND()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelLowering.cpp554 EVT OutVT = Op.getValueType(); in LowerLOAD() local
727 result = DAG.getNode(ISD::SIGN_EXTEND, dl, OutVT, result); in LowerLOAD()
729 result = DAG.getNode(ISD::ZERO_EXTEND, dl, OutVT, result); in LowerLOAD()
733 if (OutVT.isFloatingPoint()) in LowerLOAD()
736 result = DAG.getNode(NewOpc, dl, OutVT, result); in LowerLOAD()
739 SDVTList retvts = DAG.getVTList(OutVT, MVT::Other); in LowerLOAD()
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp3743 MVT OutVT = MVT::getVectorVT(MVT::getIntegerVT(P.Operand * 8), in getPermuteNode() local
3745 Op = DAG.getNode(SystemZISD::PACK, DL, OutVT, Op0, Op1); in getPermuteNode()
4412 EVT OutVT = Op.getValueType(); in lowerExtendVectorInreg() local
4414 unsigned ToBits = OutVT.getVectorElementType().getSizeInBits(); in lowerExtendVectorInreg()
4418 EVT OutVT = MVT::getVectorVT(MVT::getIntegerVT(FromBits), in lowerExtendVectorInreg() local
4420 PackedOp = DAG.getNode(UnpackHigh, SDLoc(PackedOp), OutVT, PackedOp); in lowerExtendVectorInreg()
4906 EVT OutVT = MVT::getVectorVT(MVT::getIntegerVT(ElemBytes * 16), in combineMERGE() local
4912 SDValue Op = DAG.getNode(Opcode, SDLoc(N), OutVT, Op1); in combineMERGE()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp3994 MVT OutVT = MVT::getVectorVT(MVT::getIntegerVT(P.Operand * 8), in getPermuteNode() local
3996 Op = DAG.getNode(SystemZISD::PACK, DL, OutVT, Op0, Op1); in getPermuteNode()
4701 EVT OutVT = Op.getValueType(); in lowerExtendVectorInreg() local
4703 unsigned ToBits = OutVT.getScalarSizeInBits(); in lowerExtendVectorInreg()
4707 EVT OutVT = MVT::getVectorVT(MVT::getIntegerVT(FromBits), in lowerExtendVectorInreg() local
4709 PackedOp = DAG.getNode(UnpackHigh, SDLoc(PackedOp), OutVT, PackedOp); in lowerExtendVectorInreg()
5348 EVT OutVT = MVT::getVectorVT(MVT::getIntegerVT(ElemBytes * 16), in combineMERGE() local
5354 SDValue Op = DAG.getNode(Opcode, SDLoc(N), OutVT, Op1); in combineMERGE()
/external/llvm/lib/Target/X86/
DX86InstrSSE.td4294 multiclass sse2_pack<bits<8> opc, string OpcodeStr, ValueType OutVT,
4304 (OutVT (OpNode (ArgVT VR128:$src1), VR128:$src2)))]>,
4313 (OutVT (OpNode (ArgVT VR128:$src1),
4318 multiclass sse2_pack_y<bits<8> opc, string OpcodeStr, ValueType OutVT,
4325 (OutVT (OpNode (ArgVT VR256:$src1), VR256:$src2)))]>,
4332 (OutVT (OpNode (ArgVT VR256:$src1),
4337 multiclass sse4_pack<bits<8> opc, string OpcodeStr, ValueType OutVT,
4347 (OutVT (OpNode (ArgVT VR128:$src1), VR128:$src2)))]>,
4356 (OutVT (OpNode (ArgVT VR128:$src1),
4361 multiclass sse4_pack_y<bits<8> opc, string OpcodeStr, ValueType OutVT,
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DX86InstrAVX512.td292 multiclass AVX512_maskable_3src_cast<bits<8> O, Format F, X86VectorVTInfo OutVT,
297 AVX512_maskable_common<O, F, OutVT, Outs,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp17068 EVT InVT = MVT::i16, OutVT = MVT::i8; in truncateVectorWithPACK() local
17072 OutVT = MVT::i16; in truncateVectorWithPACK()
17078 OutVT = EVT::getVectorVT(Ctx, OutVT, 128 / OutVT.getSizeInBits()); in truncateVectorWithPACK()
17080 SDValue Res = DAG.getNode(Opcode, DL, OutVT, In, In); in truncateVectorWithPACK()
17092 OutVT = EVT::getVectorVT(Ctx, OutVT, SubSizeInBits / OutVT.getSizeInBits()); in truncateVectorWithPACK()
17098 SDValue Res = DAG.getNode(Opcode, DL, OutVT, Lo, Hi); in truncateVectorWithPACK()
17107 SDValue Res = DAG.getNode(Opcode, DL, OutVT, Lo, Hi); in truncateVectorWithPACK()
36580 EVT OutVT = N->getValueType(0); in combineVectorTruncationWithPACKUS() local
36581 EVT OutSVT = OutVT.getVectorElementType(); in combineVectorTruncationWithPACKUS()
36604 return truncateVectorWithPACK(X86ISD::PACKUS, OutVT, In, DL, DAG, Subtarget); in combineVectorTruncationWithPACKUS()
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DX86InstrSSE.td3640 multiclass sse2_pack<bits<8> opc, string OpcodeStr, ValueType OutVT,
3651 (OutVT (OpNode (ArgVT RC:$src1), RC:$src2)))]>,
3660 (OutVT (OpNode (ArgVT RC:$src1),
3665 multiclass sse4_pack<bits<8> opc, string OpcodeStr, ValueType OutVT,
3676 (OutVT (OpNode (ArgVT RC:$src1), RC:$src2)))]>,
3685 (OutVT (OpNode (ArgVT RC:$src1),
DX86InstrAVX512.td326 multiclass AVX512_maskable_3src_cast<bits<8> O, Format F, X86VectorVTInfo OutVT,
331 AVX512_maskable_common<O, F, OutVT, Outs,