Searched refs:SMAXV (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 155 SMAXV, enumerator
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| D | AArch64ISelLowering.cpp | 912 case AArch64ISD::SMAXV: return "AArch64ISD::SMAXV"; in getTargetNodeName()
8551 return combineAcrossLanesIntrinsic(AArch64ISD::SMAXV, N, DAG); in performIntrinsicCombine()
9018 Opcode = AArch64ISD::SMAXV; in tryMatchAcrossLaneShuffleForReduction()
10129 case AArch64ISD::SMAXV: in ReplaceNodeResults()
10130 ReplaceReductionResults(N, Results, DAG, ISD::SMAX, AArch64ISD::SMAXV); in ReplaceNodeResults()
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| D | AArch64InstrInfo.td | 296 def AArch64smaxv : SDNode<"AArch64ISD::SMAXV", SDT_AArch64UnaryVec>;
4126 defm SMAXV : SIMDAcrossLanesBHS<0, 0b01010, "smaxv">;
4259 defm : SIMDAcrossLanesSignedIntrinsic<"SMAXV", AArch64smaxv>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 155 SMAXV, enumerator
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| D | AArch64ISelLowering.cpp | 1163 case AArch64ISD::SMAXV: return "AArch64ISD::SMAXV"; in getTargetNodeName()
7655 return getReductionSDNode(AArch64ISD::SMAXV, dl, Op, DAG); in LowerVECREDUCE()
9716 return combineAcrossLanesIntrinsic(AArch64ISD::SMAXV, N, DAG); in performIntrinsicCombine()
11284 case AArch64ISD::SMAXV: in ReplaceNodeResults()
11285 ReplaceReductionResults(N, Results, DAG, ISD::SMAX, AArch64ISD::SMAXV); in ReplaceNodeResults()
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| D | AArch64InstrInfo.td | 329 def AArch64smaxv : SDNode<"AArch64ISD::SMAXV", SDT_AArch64UnaryVec>;
4457 defm SMAXV : SIMDAcrossLanesBHS<0, 0b01010, "smaxv">;
4590 defm : SIMDAcrossLanesSignedIntrinsic<"SMAXV", AArch64smaxv>;
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2966 ### SMAXV ### subsection
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenDAGISel.inc | 15805 /* 30420*/ /*SwitchOpcode*/ 108, TARGET_VAL(AArch64ISD::SMAXV),// ->30531
15947 /* 30749*/ /*SwitchOpcode*/ 103, TARGET_VAL(AArch64ISD::SMAXV),// ->30855
17677 /* 34092*/ /*SwitchOpcode*/ 98, TARGET_VAL(AArch64ISD::SMAXV),// ->34193
17946 /* 34781*/ /*SwitchOpcode*/ 10|128,1/*138*/, TARGET_VAL(AArch64ISD::SMAXV),// ->34923
47254 /* 92135*/ /*SwitchOpcode*/ 20|128,1/*148*/, TARGET_VAL(AArch64ISD::SMAXV),// ->92287
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