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Searched refs:STORE (Results 1 – 25 of 186) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dhorizontal.ll3 …hor-store -S < %s -mtriple=x86_64-apple-macosx -mcpu=corei7-avx | FileCheck %s --check-prefix=STORE
59 ; STORE-LABEL: @add_red(
60 ; STORE-NEXT: entry:
61 ; STORE-NEXT: [[CMP31:%.*]] = icmp sgt i32 [[N:%.*]], 0
62 ; STORE-NEXT: br i1 [[CMP31]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_END:%.*]]
63 ; STORE: for.body.lr.ph:
64 ; STORE-NEXT: [[TMP0:%.*]] = sext i32 [[N]] to i64
65 ; STORE-NEXT: br label [[FOR_BODY:%.*]]
66 ; STORE: for.body:
67 ; STORE-NEXT: [[I_033:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Instrumentation/AddressSanitizer/
Dasan-masked-load-store.ll2 ; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL
4 ; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL
17 ;;;;;;;;;;;;;;;; STORE
26 ; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
27 ; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
28 ; STORE: call void @__asan_store4(i64 [[PGEP0]])
29 ; STORE: [[GEP1:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 1
30 ; STORE: [[PGEP1:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP1]] to i64
31 ; STORE: call void @__asan_store4(i64 [[PGEP1]])
32 ; STORE: [[GEP2:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 2
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/external/e2fsprogs/lib/ext2fs/
Dicount.c719 #define STORE 0x02 macro
731 { STORE, 42, 42, 42 },
732 { STORE, 1, 1, 1 },
733 { STORE, 2, 2, 2 },
734 { STORE, 3, 3, 3 },
735 { STORE, 10, 1, 1 },
736 { STORE, 42, 0, 0 },
757 { STORE, 1, 1, 1 },
758 { STORE, 2, 2, 2 },
759 { STORE, 3, 3, 3 },
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dhsw_queryobj.c46 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
50 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
54 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
59 MI_MATH_ALU2(STORE, R1, ACCU), in mult_gpr0_by_80()
63 MI_MATH_ALU2(STORE, R2, ACCU), in mult_gpr0_by_80()
68 MI_MATH_ALU2(STORE, R2, ACCU), in mult_gpr0_by_80()
73 MI_MATH_ALU2(STORE, R0, ACCU), in mult_gpr0_by_80()
95 MI_MATH_ALU2(STORE, R0, ACCU), in keep_gpr0_lower_n_bits()
123 MI_MATH_ALU2(STORE, R0, ACCU), in shl_gpr0_by_30_bits()
175 MI_MATH_ALU2(STORE, R0, ACCU), in gpr0_to_bool()
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Dhsw_sol.c109 OUT_BATCH(MI_MATH_ALU2(STORE, R1, ACCU)); in tally_prims_written()
114 OUT_BATCH(MI_MATH_ALU2(STORE, R0, ACCU)); in tally_prims_written()
131 OUT_BATCH(MI_MATH_ALU2(STORE, R0, ACCU)); in tally_prims_written()
140 OUT_BATCH(MI_MATH_ALU2(STORE, R1, ACCU)); in tally_prims_written()
144 OUT_BATCH(MI_MATH_ALU2(STORE, R0, ACCU)); in tally_prims_written()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonDepIICHVX.td97 InstrItinData <tc_0317c6ca, /*SLOT0,STORE,VA*/
103 InstrItinData <tc_1b93bdc6, /*SLOT0,STORE*/
118 InstrItinData <tc_29841470, /*SLOT0,STORE*/
128 InstrItinData <tc_354299ad, /*SLOT0,NOSLOT1,STORE,VP*/
172 InstrItinData <tc_4f190ba3, /*SLOT0,STORE,VA*/
195 InstrItinData <tc_5c03dc63, /*SLOT0,STORE*/
238 InstrItinData <tc_6fd9ad30, /*SLOT0,NOSLOT1,STORE,VP*/
275 InstrItinData <tc_7fa82b08, /*SLOT0,NOSLOT1,STORE,VP*/
287 InstrItinData <tc_85d237e3, /*SLOT0,STORE,VA*/
298 InstrItinData <tc_8b6a873f, /*SLOT0,STORE*/
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/external/curl/tests/data/
Dtest8156 STORE
27 IMAP STORE - delete message (CUSTOMREQUEST)
30 imap://%HOSTIP:%IMAPPORT/815 -X 'STORE 123 +Flags \Deleted' -u user:secret -: imap://%HOSTIP:%IMAPP…
41 A004 STORE 123 +Flags \Deleted
Dtest8166 STORE
30 IMAP STORE - delete message with confirmation (CUSTOMREQUEST)
33 imap://%HOSTIP:%IMAPPORT/816 -X 'STORE 123 +Flags \Deleted' -u user:secret -: imap://%HOSTIP:%IMAPP…
44 A004 STORE 123 +Flags \Deleted
/external/swiftshader/third_party/subzero/tests_lit/asan_tests/
Derrors.ll63 ; RUN: --check-prefix=LOCAL-STORE %s
67 ; RUN: --check-prefix=LOCAL-STORE %s
73 ; RUN: --check-prefix=LOCAL-STORE %s
77 ; RUN: --check-prefix=LOCAL-STORE %s
83 ; RUN: --check-prefix=LOCAL-STORE %s
87 ; RUN: --check-prefix=LOCAL-STORE %s
93 ; RUN: --check-prefix=GLOBAL-STORE %s
97 ; RUN: --check-prefix=GLOBAL-STORE %s
103 ; RUN: --check-prefix=GLOBAL-STORE %s
107 ; RUN: --check-prefix=GLOBAL-STORE %s
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Dquarantine.ll16 ; RUN: %t.pexe -o %t && %t 1 2>&1 | FileCheck --check-prefix=STORE %s
19 ; RUN: %t.pexe -o %t && %t 1 2>&1 | FileCheck --check-prefix=STORE %s
68 ; STORE: Illegal 4 byte store to freed object at
/external/elfutils/libelf/
Dgelf_xlate.c68 #define STORE(Bits, ptr, val) (*(uint##Bits##_t *) ptr = val) macro
80 #define STORE(Bits, ptr, val) (((union unaligned *) ptr)->u##Bits = val) macro
99 case 2: STORE (16, dest, bswap_16 (FETCH (16, ptr))); break; \
100 case 4: STORE (32, dest, bswap_32 (FETCH (32, ptr))); break; \
101 case 8: STORE (64, dest, bswap_64 (FETCH (64, ptr))); break; \
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dcprestore-noreorder-noat.s12 # RUN: FileCheck %s -check-prefix=NO-STORE
15 # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=NO-STORE
29 # NO-STORE-NOT: sw $gp, 8($sp)
48 # NO-STORE-NOT: sw $gp,
/external/llvm/test/MC/Mips/
Dcprestore-noreorder-noat.s12 # RUN: FileCheck %s -check-prefix=NO-STORE
15 # RUN: llvm-objdump -d -r - | FileCheck %s -check-prefix=NO-STORE
29 # NO-STORE-NOT: sw $gp, 8($sp)
48 # NO-STORE-NOT: sw $gp,
/external/elfutils/libcpu/
Dbpf_disasm.c69 #define STORE(T, S) "*(" #T " *)(" REG(1) OFF(3) ") = " S macro
410 code_fmt = STORE(u8, REG(2)); in bpf_disasm()
413 code_fmt = STORE(u16, REG(2)); in bpf_disasm()
416 code_fmt = STORE(u32, REG(2)); in bpf_disasm()
419 code_fmt = STORE(u64, REG(2)); in bpf_disasm()
430 code_fmt = STORE(u8, IMMS(2)); in bpf_disasm()
433 code_fmt = STORE(u16, IMMS(2)); in bpf_disasm()
436 code_fmt = STORE(u32, IMMS(2)); in bpf_disasm()
439 code_fmt = STORE(u64, IMMS(2)); in bpf_disasm()
/external/v8/src/compiler/
Dmachine-operator.cc524 #define STORE(Type) \ macro
580 MACHINE_REPRESENTATION_LIST(STORE)
581 #undef STORE
878 #define STORE(kRep) \ in UnalignedStore() macro
881 MACHINE_REPRESENTATION_LIST(STORE) in UnalignedStore()
882 #undef STORE in UnalignedStore()
960 #define STORE(kRep) \ in Store() macro
973 MACHINE_REPRESENTATION_LIST(STORE) in Store()
974 #undef STORE in Store()
985 #define STORE(kRep) \ in ProtectedStore() macro
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/external/webp/src/dsp/
Ddec.c29 #define STORE(x, y, v) \ macro
34 STORE(0, y, DC + (d)); \
35 STORE(1, y, DC + (c)); \
36 STORE(2, y, DC - (c)); \
37 STORE(3, y, DC - (d)); \
74 STORE(0, 0, a + d); in TransformOne_C()
75 STORE(1, 0, b + c); in TransformOne_C()
76 STORE(2, 0, b - c); in TransformOne_C()
77 STORE(3, 0, a - d); in TransformOne_C()
118 STORE(i, j, DC); in TransformDC_C()
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/external/pdfium/third_party/libopenjpeg20/
Ddwt.c608 #define STORE(x,y) _mm256_store_si256((VREG*)(x),(y)) macro
618 #define STORE(x,y) _mm_store_si128((VREG*)(x),(y)) macro
703 STORE(tmp + PARALLEL_COLS_53 * (i + 0), s0c_0); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
704 STORE(tmp + PARALLEL_COLS_53 * (i + 0) + VREG_INT_COUNT, s0c_1); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
707 STORE(tmp + PARALLEL_COLS_53 * (i + 1) + 0, in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
709 STORE(tmp + PARALLEL_COLS_53 * (i + 1) + VREG_INT_COUNT, in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
713 STORE(tmp + PARALLEL_COLS_53 * (i + 0) + 0, s0n_0); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
714 STORE(tmp + PARALLEL_COLS_53 * (i + 0) + VREG_INT_COUNT, s0n_1); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
721 STORE(tmp + PARALLEL_COLS_53 * (len - 1), tmp_len_minus_1); in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
723 STORE(tmp + PARALLEL_COLS_53 * (len - 2), in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
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/external/mesa3d/src/compiler/nir/
Dnir_intrinsics.h462 #define STORE(name, srcs, num_indices, idx0, idx1, idx2, flags) \ macro
466 STORE(output, 2, 3, BASE, WRMASK, COMPONENT, 0)
470 STORE(per_vertex_output, 3, 3, BASE, WRMASK, COMPONENT, 0)
472 STORE(ssbo, 3, 1, WRMASK, xx, xx, 0)
474 STORE(shared, 2, 2, BASE, WRMASK, xx, 0)
/external/libxaac/decoder/armv7/
Dixheaacd_harm_idx_zerotwolp.s62 B STORE
74 STORE: label
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIMemoryLegalizer.cpp59 STORE = 1u << 1, enumerator
60 LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ STORE)
879 SIMemOp::LOAD | SIMemOp::STORE, in expandLoad()
918 SIMemOp::LOAD | SIMemOp::STORE, in expandStore()
955 SIMemOp::LOAD | SIMemOp::STORE, in expandAtomicFence()
985 SIMemOp::LOAD | SIMemOp::STORE, in expandAtomicCmpxchgOrRmw()
997 SIMemOp::STORE, in expandAtomicCmpxchgOrRmw()
/external/tensorflow/tensorflow/core/kernels/
Dsparse_matmul_op.cc282 #define STORE(x, y) Eigen::internal::pstore<float>(x, y); macro
420 STORE(*out, c1); in MulAdd()
421 STORE(*out + kNumOperands, c2); in MulAdd()
452 STORE(*out, c1); in MulAdd3Way()
453 STORE(*out + kNumOperands, c2); in MulAdd3Way()
502 STORE(*out, c1); in TwoMulAdd3Way()
503 STORE(*out + kNumOperands, c2); in TwoMulAdd3Way()
504 STORE(*out + 2 * kNumOperands, c3); in TwoMulAdd3Way()
505 STORE(*out + 3 * kNumOperands, c4); in TwoMulAdd3Way()
529 STORE(*out, c); in MulAdd()
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DSlotIndexes.h86 enum Slot { LOAD, USE, DEF, STORE, NUM };
211 return getSlot() == STORE;
249 return SlotIndex(&entry(), SlotIndex::STORE);
260 if (s == SlotIndex::STORE) {
281 return SlotIndex(entry().getPrev(), SlotIndex::STORE);
/external/u-boot/arch/riscv/include/asm/
Dencoding.h123 #define PTE_CHECK_PERM(_PTE, _SUPERVISOR, STORE, FETCH) \ argument
126 ((STORE) ? ((SUPERVISOR) ? PTE_SW(PTE) : PTE_UW(PTE)) : \
/external/pcre/dist2/src/sljit/
DsljitNativeARM_64.c801 #define STORE 0x10 macro
817 if (!(flags & STORE)) in emit_op_mem()
1199 return emit_op_mem(compiler, mem_flags | STORE, dst_r, dst, dstw, TMP_REG2); in sljit_emit_op1()
1222 return emit_op_mem(compiler, mem_flags | STORE, dst_r, dst, dstw, TMP_REG2); in sljit_emit_op1()
1277 return emit_op_mem(compiler, mem_flags | STORE, dst_r, dst, dstw, TMP_REG2); in sljit_emit_op2()
1313 if (!(flags & STORE)) in emit_fop_mem()
1373 …r, ((GET_OPCODE(op) == SLJIT_CONV_S32_FROM_F64) ? INT_SIZE : WORD_SIZE) | STORE, TMP_REG1, dst, ds… in sljit_emit_fop1_conv_sw_from_f64()
1402 …return emit_fop_mem(compiler, ((op & SLJIT_F32_OP) ? INT_SIZE : WORD_SIZE) | STORE, TMP_FREG1, dst… in sljit_emit_fop1_conv_f64_from_sw()
1467 return emit_fop_mem(compiler, mem_flags | STORE, dst_r, dst, dstw); in sljit_emit_fop1()
1512 return emit_fop_mem(compiler, mem_flags | STORE, TMP_FREG1, dst, dstw); in sljit_emit_fop2()
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/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/
Dstreamout_jit.cpp197 STORE(numPrimStorageNeeded, pSoCtx, { 0, SWR_STREAMOUT_CONTEXT_numPrimStorageNeeded }); in buildStream()
216 STORE(numPrimsWritten, pSoCtx, { 0, SWR_STREAMOUT_CONTEXT_numPrimsWritten }); in buildStream()
257 STORE(streamOffset, pBuf, { 0, SWR_STREAMOUT_BUFFER_streamOffset }); in buildStream()

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