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Searched refs:SUBCARRY (Results 1 – 16 of 16) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h242 ADDCARRY, SUBCARRY, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td216 // TODO: remove AMDGPUadde/AMDGPUsube when ADDCARRY/SUBCARRY get their own
220 def AMDGPUsube : SDNode<"ISD::SUBCARRY", AMDGPUAddeSubeOp, []>;
DAMDGPUISelLowering.cpp1655 SDValue Sub1_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Lo, in LowerUDIVREM64()
1657 SDValue Sub1_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, LHS_Hi, in LowerUDIVREM64()
1675 SDValue Sub2_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Lo, in LowerUDIVREM64()
1677 SDValue Sub2_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub1_Mi, in LowerUDIVREM64()
1679 SDValue Sub2_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi, in LowerUDIVREM64()
1695 SDValue Sub3_Lo = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Lo, in LowerUDIVREM64()
1697 SDValue Sub3_Mi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub2_Mi, in LowerUDIVREM64()
1699 SDValue Sub3_Hi = DAG.getNode(ISD::SUBCARRY, DL, HalfCarryVT, Sub3_Mi, in LowerUDIVREM64()
DSIISelLowering.cpp233 setOperationAction(ISD::SUBCARRY, MVT::i32, Legal); in SITargetLowering()
237 setOperationAction(ISD::SUBCARRY, MVT::i64, Legal); in SITargetLowering()
621 setTargetDAGCombine(ISD::SUBCARRY); in SITargetLowering()
7409 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::SUBCARRY : ISD::ADDCARRY; in performAddCombine()
7436 if (Opc != ISD::SUBCARRY) in performSubCombine()
7439 if (LHS.getOpcode() == ISD::SUBCARRY) { in performSubCombine()
7445 return DAG.getNode(ISD::SUBCARRY, SDLoc(N), LHS->getVTList(), Args); in performSubCombine()
7468 (LHSOpc == ISD::SUB && Opc == ISD::SUBCARRY)) { in performAddCarrySubCarryCombine()
7802 case ISD::SUBCARRY: in PerformDAGCombine()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h99 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
DSystemZISelLowering.cpp177 setOperationAction(ISD::SUBCARRY, VT, Custom); in SystemZTargetLowering()
3286 case ISD::SUBCARRY: in lowerADDSUBCARRY()
3287 BaseOp = SystemZISD::SUBCARRY; in lowerADDSUBCARRY()
4818 case ISD::SUBCARRY: in LowerOperation()
5003 OPCODE(SUBCARRY); in getTargetNodeName()
DSystemZOperators.td281 def z_subcarry_1 : SDNode<"SystemZISD::SUBCARRY", SDT_ZBinaryWithCarry>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeIntegerTypes.cpp142 case ISD::SUBCARRY: Res = PromoteIntRes_ADDSUBCARRY(N, ResNo); break; in PromoteIntegerResult()
962 case ISD::SUBCARRY: Res = PromoteIntOp_ADDSUBCARRY(N, OpNo); break; in PromoteIntegerOperand()
1466 case ISD::SUBCARRY: ExpandIntRes_ADDSUBCARRY(N, Lo, Hi); break; in ExpandIntegerResult()
1812 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_ADDSUB()
1823 Hi = DAG.getNode(ISD::SUBCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
1981 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_UADDSUBO()
1993 unsigned Opc = N->getOpcode() == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY; in ExpandIntRes_UADDSUBO()
3162 SDValue LowCmp = DAG.getNode(ISD::SUBCARRY, dl, VTList, LHSLo, RHSLo, Carry); in ExpandIntOp_SETCCCARRY()
DSelectionDAGDumper.cpp278 case ISD::SUBCARRY: return "subcarry"; in getOperationName()
DLegalizeDAG.cpp3503 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY; in ExpandNode()
DDAGCombiner.cpp1511 case ISD::SUBCARRY: return visitSUBCARRY(N); in visit()
2217 if (V.getOpcode() != ISD::ADDCARRY && V.getOpcode() != ISD::SUBCARRY && in getAsCarry()
2475 SDValue Sub = DAG.getNode(ISD::SUBCARRY, DL, N->getVTList(), in visitADDCARRY()
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DReleaseNotes.rst290 should use ``UADDO``/``ADDCARRY``/``USUBO``/``SUBCARRY`` instead of the deprecated opcodes.
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1341 setOperationAction(ISD::SUBCARRY, VT, Expand); in HexagonTargetLowering()
1344 setOperationAction(ISD::SUBCARRY, MVT::i64, Custom); in HexagonTargetLowering()
2807 case ISD::SUBCARRY: return LowerAddSubCarry(Op, DAG); in LowerOperation()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp621 setOperationAction(ISD::SUBCARRY, VT, Expand); in initActions()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp811 setOperationAction(ISD::SUBCARRY, MVT::i32, Custom); in ARMTargetLowering()
8121 case ISD::SUBCARRY: return LowerADDSUBCARRY(Op, DAG); in LowerOperation()
12721 Res = DAG.getNode(ISD::SUBCARRY, dl, VTs, FalseVal, Subc, Subc.getValue(1)); in PerformCMOVCombine()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp1663 setOperationAction(ISD::SUBCARRY, VT, Custom); in X86TargetLowering()
25377 case ISD::SUBCARRY: return LowerADDSUBCARRY(Op, DAG); in LowerOperation()