| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 2196 EVT ShiftVT = TLI.getShiftAmountTy(N0.getValueType()); in LowerI8Math() local
2230 if (!N1VT.bitsEq(ShiftVT)) { in LowerI8Math()
2231 unsigned N1Opc = N1.getValueType().bitsLT(ShiftVT) in LowerI8Math()
2234 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1); in LowerI8Math()
2253 if (!N1VT.bitsEq(ShiftVT)) { in LowerI8Math()
2256 if (N1.getValueType().bitsGT(ShiftVT)) in LowerI8Math()
2259 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1); in LowerI8Math()
2270 if (!N1VT.bitsEq(ShiftVT)) { in LowerI8Math()
2273 if (N1VT.bitsGT(ShiftVT)) in LowerI8Math()
2275 N1 = DAG.getNode(N1Opc, dl, ShiftVT, N1); in LowerI8Math()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1492 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN() local
1495 ShiftVT = MagVT; in ExpandFCOPYSIGN()
1498 SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1499 SignBit = DAG.getNode(ISD::SRL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
1501 SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, ShiftVT); in ExpandFCOPYSIGN()
1502 SignBit = DAG.getNode(ISD::SHL, DL, ShiftVT, SignBit, ShiftCnst); in ExpandFCOPYSIGN()
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| D | DAGCombiner.cpp | 2917 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitMUL() local
2918 SDValue Trunc = DAG.getZExtOrTrunc(LogBase2, DL, ShiftVT); in visitMUL()
3289 EVT ShiftVT = getShiftAmountTy(N0.getValueType()); in visitUDIVLike() local
3290 SDValue Trunc = DAG.getZExtOrTrunc(LogBase2, DL, ShiftVT); in visitUDIVLike()
4022 EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in visitANDLike() local
4027 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike()
5292 EVT ShiftVT = OppShift.getOperand(1).getValueType(); in extractShiftForRotate() local
5294 SDValue NewShiftNode = DAG.getConstant(NeededShiftAmt, DL, ShiftVT); in extractShiftForRotate()
6267 EVT ShiftVT = C1->getValueType(0); in visitRotate() local
6271 DAG.FoldConstantArithmetic(CombineOp, dl, ShiftVT, C1, C2)) { in visitRotate()
[all …]
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 4871 EVT ShiftVT = N0.getOperand(1).getValueType(); in combineSIGN_EXTEND() local
4876 ShiftVT)); in combineSIGN_EXTEND()
4878 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in combineSIGN_EXTEND()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 5313 EVT ShiftVT = N0.getOperand(1).getValueType(); in combineSIGN_EXTEND() local
5318 ShiftVT)); in combineSIGN_EXTEND()
5320 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in combineSIGN_EXTEND()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3380 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local
3381 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, in LowerShift()
3382 getZeroVector(ShiftVT, DAG, dl), in LowerShift()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 10162 static int matchVectorShuffleAsShift(MVT &ShiftVT, unsigned &Opcode, in matchVectorShuffleAsShift() argument
10200 ShiftVT = ByteShift ? MVT::getVectorVT(MVT::i8, SizeInBits / 8) in matchVectorShuffleAsShift()
10233 MVT ShiftVT; in lowerVectorShuffleAsShift() local
10239 ShiftVT, Opcode, VT.getScalarSizeInBits(), Mask, 0, Zeroable, Subtarget); in lowerVectorShuffleAsShift()
10244 matchVectorShuffleAsShift(ShiftVT, Opcode, VT.getScalarSizeInBits(), in lowerVectorShuffleAsShift()
10252 assert(DAG.getTargetLoweringInfo().isTypeLegal(ShiftVT) && in lowerVectorShuffleAsShift()
10254 V = DAG.getBitcast(ShiftVT, V); in lowerVectorShuffleAsShift()
10255 V = DAG.getNode(Opcode, DL, ShiftVT, V, in lowerVectorShuffleAsShift()
23107 MVT ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerScalarImmediateShift() local
23131 SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT, in LowerScalarImmediateShift()
[all …]
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4821 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local
4822 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, in LowerShift()
4823 getZeroVector(ShiftVT, DAG, dl), in LowerShift()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 5578 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local
5579 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, in LowerShift()
5580 getZeroVector(ShiftVT, DAG, dl), in LowerShift()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2991 EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout()); in visitANDLike() local
2996 SDValue ShiftK = DAG.getConstant(ShiftBits, SL, ShiftVT); in visitANDLike()
|