| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 30 SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) in SparcInstrInfo() function in SparcInstrInfo
40 unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, in isLoadFromStackSlot()
59 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr *MI, in isStoreToStackSlot()
116 bool SparcInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, in AnalyzeBranch()
219 SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, in InsertBranch()
247 unsigned SparcInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const in RemoveBranch()
269 void SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
286 void SparcInstrInfo::
308 void SparcInstrInfo::
326 unsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const in getGlobalBaseReg()
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| D | SparcFrameLowering.cpp | 32 const SparcInstrInfo &TII = in emitPrologue()
33 *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo()); in emitPrologue()
73 const SparcInstrInfo &TII = in emitEpilogue()
74 *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo()); in emitEpilogue()
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| D | Sparc.td | 39 include "SparcInstrInfo.td"
41 def SparcInstrInfo : InstrInfo;
71 let InstructionSet = SparcInstrInfo;
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| D | SparcInstrInfo.h | 37 class SparcInstrInfo : public SparcGenInstrInfo {
41 explicit SparcInstrInfo(SparcSubtarget &ST);
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| D | SparcTargetMachine.h | 33 SparcInstrInfo InstrInfo;
40 virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 33 void SparcInstrInfo::anchor() {} in anchor()
35 SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) in SparcInstrInfo() function in SparcInstrInfo
44 unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
63 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
160 bool SparcInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
243 unsigned SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB, in InsertBranch()
272 unsigned SparcInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const in RemoveBranch()
294 bool SparcInstrInfo::ReverseBranchCondition( in ReverseBranchCondition()
302 void SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
391 void SparcInstrInfo::
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| D | SparcFrameLowering.cpp | 48 const SparcInstrInfo &TII = in emitSPAdjustment()
49 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitSPAdjustment()
91 const SparcInstrInfo &TII = in emitPrologue()
92 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitPrologue()
206 const SparcInstrInfo &TII = in emitEpilogue()
207 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitEpilogue()
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| D | SparcInstrInfo.h | 39 class SparcInstrInfo : public SparcGenInstrInfo {
44 explicit SparcInstrInfo(SparcSubtarget &ST);
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| D | SparcSubtarget.h | 60 SparcInstrInfo InstrInfo;
69 const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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| D | Sparc.td | 61 include "SparcInstrInfo.td"
63 def SparcInstrInfo : InstrInfo;
157 let InstructionSet = SparcInstrInfo;
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| D | CMakeLists.txt | 18 SparcInstrInfo.cpp
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| D | SparcInstrAliases.td | 342 // Note: cmp is handled in SparcInstrInfo.
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| D | SparcInstr64Bit.td | 13 // Some SPARC v9 instructions are defined in SparcInstrInfo.td because they can
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 33 void SparcInstrInfo::anchor() {} in anchor()
35 SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) in SparcInstrInfo() function in SparcInstrInfo
44 unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
63 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
160 bool SparcInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
243 unsigned SparcInstrInfo::insertBranch(MachineBasicBlock &MBB, in insertBranch()
274 unsigned SparcInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch()
298 bool SparcInstrInfo::reverseBranchCondition( in reverseBranchCondition()
306 void SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
395 void SparcInstrInfo::
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| D | SparcFrameLowering.cpp | 48 const SparcInstrInfo &TII = in emitSPAdjustment()
49 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitSPAdjustment()
92 const SparcInstrInfo &TII = in emitPrologue()
93 *static_cast<const SparcInstrInfo *>(Subtarget.getInstrInfo()); in emitPrologue()
224 const SparcInstrInfo &TII = in emitEpilogue()
225 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitEpilogue()
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| D | SparcInstrInfo.h | 39 class SparcInstrInfo : public SparcGenInstrInfo {
44 explicit SparcInstrInfo(SparcSubtarget &ST);
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| D | SparcSubtarget.h | 54 SparcInstrInfo InstrInfo;
63 const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
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| D | Sparc.td | 73 include "SparcInstrInfo.td"
75 def SparcInstrInfo : InstrInfo;
176 let InstructionSet = SparcInstrInfo;
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| D | CMakeLists.txt | 19 SparcInstrInfo.cpp
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| D | SparcInstrAliases.td | 342 // Note: cmp is handled in SparcInstrInfo.
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| /external/swiftshader/third_party/LLVM/test/CodeGen/Generic/ |
| D | 2002-04-14-UnexpectedUnsignedType.ll | 4 ; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"'
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Generic/ |
| D | 2002-04-14-UnexpectedUnsignedType.ll | 4 ; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"'
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| /external/llvm/test/CodeGen/Generic/ |
| D | 2002-04-14-UnexpectedUnsignedType.ll | 4 ; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"'
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| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 203 SparcInstrInfo InstrInfo;
212 virtual const SparcInstrInfo *getInstrInfo() const {return &InstrInfo; }
750 floating-point operations. ``SparcInstrInfo.td`` also adds the base class
753 ``SparcInstrInfo.td`` largely consists of operand and instruction definitions
754 for the SPARC target. In ``SparcInstrInfo.td``, the following target
770 ``MEMrr`` that is defined earlier in ``SparcInstrInfo.td``:
800 ``defm`` directive). For example in ``SparcInstrInfo.td``, the ``multiclass``
826 ``SparcInstrInfo.td`` also includes definitions for condition codes that are
828 ``SparcInstrInfo.td`` indicate the bit location of the SPARC condition code.
846 correspond to the values in ``SparcInstrInfo.td``. I.e., ``SPCC::ICC_NE = 9``,
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 203 SparcInstrInfo InstrInfo;
212 virtual const SparcInstrInfo *getInstrInfo() const {return &InstrInfo; }
750 floating-point operations. ``SparcInstrInfo.td`` also adds the base class
753 ``SparcInstrInfo.td`` largely consists of operand and instruction definitions
754 for the SPARC target. In ``SparcInstrInfo.td``, the following target
770 ``MEMrr`` that is defined earlier in ``SparcInstrInfo.td``:
800 ``defm`` directive). For example in ``SparcInstrInfo.td``, the ``multiclass``
826 ``SparcInstrInfo.td`` also includes definitions for condition codes that are
828 ``SparcInstrInfo.td`` indicate the bit location of the SPARC condition code.
846 correspond to the values in ``SparcInstrInfo.td``. I.e., ``SPCC::ICC_NE = 9``,
[all …]
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