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Searched refs:VOP3 (Results 1 – 25 of 33) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOPInstructions.td63 // Using complex patterns gives VOP3 patterns a very high complexity rating,
69 let VOP3 = 1;
71 let AsmVariantName = AMDGPUAsmVariants.VOP3;
110 // Using complex patterns gives VOP3 patterns a very high complexity rating,
116 let VOP3 = 1;
125 let AsmVariantName = AMDGPUAsmVariants.VOP3;
164 // XXX - Is there any reason to distingusih this from regular VOP3
DSIInstrFormats.td42 field bit VOP3 = 0;
91 // This bit indicates that this is a VOP3 opcode which supports op_sel
137 let TSFlags{10} = VOP3;
191 …let hasExtraSrcRegAllocReq = !if(VOP1,1,!if(VOP2,1,!if(VOP3,1,!if(VOPC,1,!if(SDWA,1, !if(VALU,1,0)…
DSIDefines.h38 VOP3 = 1 << 10, enumerator
193 VOP3 = 1, enumerator
DAMDGPU.td576 string VOP3 = "VOP3";
595 let Name = AMDGPUAsmVariants.VOP3;
DSIInstrInfo.td1083 3))); // VOP3
1153 // Returns the register class to use for sources of VOP3 instructions for the
1248 // Returns the input arguments for VOP3 instructions for the given SrcVT.
1289 // VOP3 with modifiers
1300 // VOP3 without modifiers
1489 // Returns the assembly string for the inputs and outputs of a VOP3
1630 0, // NumSrcArgs == 3 - No DPP or SDWA for VOP3
1896 let ColFields = ["Size", "VOP3"];
1905 let ColFields = ["Size", "VOP3"];
DSIInstrInfo.h381 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3()
385 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
DVOP3Instructions.td11 // VOP3 Classes
219 // VOP3 INTERP
281 // VOP3 Instructions
DVOP3PInstructions.td20 // VOP3 neg/abs and VOP3P opsel/opsel_hi modifiers are allowed.
DVOP1Instructions.td138 // TODO: Make profile for this, there is VOP3 encoding also
381 // Never VOP3. Takes as long as 2 v_mov_b32s
DVOP2Instructions.td942 // are VOP2 on SI and VOP3 on VI.
950 let AsmVariantName = AMDGPUAsmVariants.VOP3;
DVOPCInstructions.td690 // Encoding used for VOPC instructions encoded as VOP3
928 // Encoding used for VOPC instructions encoded as VOP3
/external/llvm/lib/Target/AMDGPU/
DVIInstructions.td79 // VOP3 Instructions
89 // are VOP2 on SI and VOP3 on VI.
DSIInstrFormats.td33 field bits<1> VOP3 = 0;
69 let TSFlags{12} = VOP3;
151 // Using complex patterns gives VOP3 patterns a very high complexity rating,
157 let VOP3 = 1;
429 // Encoding used for VOPC instructions encoded as VOP3
DSIDefines.h30 VOP3 = 1 << 12, enumerator
DSIInstrInfo.h264 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3()
268 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
DVIInstrFormats.td146 // Encoding used for VOPC instructions encoded as VOP3
DCIInstructions.td59 // VOP3 Instructions
DSIInstrInfo.td46 // Specify a VOP2 opcode for SI and VOP3 opcode for VI
1142 3))); // VOP3
1166 // Returns the register class to use for sources of VOP3 instructions for the
1195 // Returns the input arguments for VOP3 instructions for the given SrcVT.
1226 // VOP3 with modifiers
1232 // VOP3 without modifiers
1339 // Returns the assembly string for the inputs and outputs of a VOP3
1403 0, // NumSrcArgs == 3 - No DPP or SDWA for VOP3
2072 // An instruction that is VOP2 on SI and VOP3 on VI, no modifiers.
2228 // A VOP2 instruction that is VOP3-only on VI.
/external/llvm/docs/
DAMDGPUUsage.rst101 VOP1, VOP2, VOP3, VOPC Instructions
/external/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp1131 if ((getForcedEncodingSize() == 32 && (TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
1132 (getForcedEncodingSize() == 64 && !(TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
1137 if ((TSFlags & SIInstrFlags::VOP3) && in checkTargetMatchPredicate()
2403 if (TSFlags & SIInstrFlags::VOP3) { in cvtVOP3_2_mod()
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUOperandSyntax.rst773 VOP3 Modifiers
852 VOP3 Operand Modifiers
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dframe-index-elimination.ll164 ; Added offset can't be used with VOP3 add
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp2147 if ((getForcedEncodingSize() == 32 && (TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
2148 (getForcedEncodingSize() == 64 && !(TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
2153 if ((TSFlags & SIInstrFlags::VOP3) && in checkTargetMatchPredicate()
2189 static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3}; in getMatchedVariants()
2205 AMDGPUAsmVariants::DEFAULT, AMDGPUAsmVariants::VOP3, in getMatchedVariants()
2282 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | in validateConstantBusLimitations()
/external/llvm/lib/Target/AMDGPU/InstPrinter/
DAMDGPUInstPrinter.cpp295 if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::VOP3) in printVOPDst()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/
DAMDGPUInstPrinter.cpp376 if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::VOP3) in printVOPDst()

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