Searched refs:ValSize (Results 1 – 9 of 9) sorted by relevance
| /external/deqp/modules/glshared/ |
| D | glsLongStressCase.hpp | 82 template <int ValSize>
83 …void set (const tcu::Vector<float, ValSize>& minValue_, const tcu::Vector<float, ValSize>& maxValu… in set()
85 type = glu::getDataTypeFloatVec(ValSize); in set()
105 template <int ValSize>
106 void set (const tcu::Vector<int, ValSize>& minValue_, const tcu::Vector<int, ValSize>& maxValue_) in set()
108 type = glu::getDataTypeVector(glu::TYPE_INT, ValSize); in set()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 139 unsigned ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
141 if (PhysRegSize > ValSize && LocSize == ValSize) { in assignValueToReg()
261 unsigned ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
263 if (PhysRegSize > ValSize && LocSize == ValSize) { in assignValueToReg()
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| /external/llvm/lib/Fuzzer/ |
| D | FuzzerTraceState.cpp | 364 size_t ValSize = ValSizeInBits / 8; in DFSanSwitchCallback() local
369 for (size_t Pos = LR.Beg; Pos + ValSize <= LR.End; Pos++) in DFSanSwitchCallback()
371 AddMutation(Pos, ValSize, Cases[i]); in DFSanSwitchCallback()
381 PC, Val, ValSize, NumCases, L, LR.Beg, LR.End, TryShort); in DFSanSwitchCallback()
461 size_t ValSize = ValSizeInBits / 8; in TraceSwitchCallback() local
471 TryToAddDesiredData(Val, Cases[i], ValSize); in TraceSwitchCallback()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 346 auto ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg() local
349 assert(ValSize <= 64 && "Unsupported value size"); in assignValueToReg()
353 if (ValSize == LocSize) { in assignValueToReg()
356 assert(ValSize < LocSize && "Extensions not supported"); in assignValueToReg()
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| D | ARMInstructionSelector.cpp | 899 const auto ValSize = ValTy.getSizeInBits(); in select() local
901 assert((ValSize != 64 || STI.hasVFP2()) && in select()
904 const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize); in select()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64LegalizerInfo.cpp | 438 uint64_t ValSize = MRI.getType(Dst).getSizeInBits() / 8; in legalizeVaArg() local
442 ValSize, std::max(Align, PtrSize))); in legalizeVaArg()
445 MIRBuilder.buildConstant(SizeReg, alignTo(ValSize, PtrSize)); in legalizeVaArg()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
| D | ScalarReplAggregates.cpp | 801 uint64_t ValSize = TD.getTypeAllocSizeInBits(SV->getType()); in ConvertScalar_InsertValue() local
805 if (ValSize == VecSize) in ConvertScalar_InsertValue()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 644 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments_64() local
649 Offset += 8 - ValSize; in LowerFormalArguments_64()
650 int FI = MF.getFrameInfo()->CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments_64()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 637 unsigned ValSize = VA.getValVT().getSizeInBits() / 8; in LowerFormalArguments_64() local
642 Offset += 8 - ValSize; in LowerFormalArguments_64()
643 int FI = MF.getFrameInfo().CreateFixedObject(ValSize, Offset, true); in LowerFormalArguments_64()
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