Home
last modified time | relevance | path

Searched refs:cs (Results 1 – 25 of 2699) sorted by relevance

12345678910>>...108

/external/doclava/res/assets/templates/
Dmacros.cs1 <?cs
3 ?><?cs
4 if:dac ?><?cs
5 # standard devsite warns on inline js and script tags ?><?cs
6 set:enable_javascript = 1 ?><?cs
9 <?cs # A link to a package ?><?cs
14 /if ?><?cs var:pkg.link ?>"><?cs var:pkg.name ?></a><?cs
15 /def ?><?cs
28 .typeArguments.N.(more links) (< ... >) ?><?cs
29 def:type_link_impl(type, link) ?><?cs call:type_link_impl2(type, link, "false") ?><?cs /def ?><?cs
[all …]
Dclass.cs1 <?cs include:"doctype.cs" ?>
2 <?cs include:"macros.cs" ?>
4 <?cs include:"head_tag.cs" ?>
6 <?cs include:"header.cs" ?>
12 <?cs # are there inherited members ?>
13 <?cs each:cl=class.inherited ?>
14 <?cs if:subcount(cl.methods) ?>
15 <?cs set:inhmethods = #1 ?>
16 <?cs /if ?>
17 <?cs if:subcount(cl.constants) ?>
[all …]
/external/doclava/res/assets/templates-sdk/
Dclass.cs1 <?cs # THIS CREATES A CLASS OR INTERFACE PAGE FROM .java FILES ?>
2 <?cs include:"macros.cs" ?>
3 <?cs include:"macros_override.cs" ?>
4 <?cs
11 <?cs
13 ?><?cs def:write_method_summary(methods, included) ?>
14 <?cs set:count = #1 ?>
15 <?cs each:method = methods ?>
16 <tr <?cs
18 ?>data-version-added="<?cs var:method.since ?>"<?cs
[all …]
Dmacros_override.cs1 <?cs # Create a comma separated list of annotations on obj that were in showAnnotations in Doclava …
2 <?cs # pre is an HTML string to start the list, post is an HTML string to close the list ?>
3 <?cs # for example call:show_annotations_list(cl, "<td>Annotations: ", "</td>") ?>
4 <?cs # if obj has nothing on obj.showAnnotations, nothing will be output ?>
5 <?cs def:show_annotations_list(obj) ?>
6 <?cs each:anno = obj.showAnnotations ?>
7 <?cs if:first(anno) ?>
10 <?cs /if ?>
11 @<?cs var:anno.type.label ?>
12 <?cs if:last(anno) == 0 ?>
[all …]
Dpage_info.cs1 <?cs # optional, more info about the page, such as API level and links ?>
2 <?cs
5 <?cs
9 ?><?cs
14 <?cs call:since_tags(package) ?>
15 <?cs call:federated_refs(package) ?>
17 </div><?cs
21 ?><?cs
26 <?cs call:since_tags(class) ?>
27 <?cs if:class.artifact ?>
[all …]
Dcustomizations.cs1 <?cs def:body_content_wrap_start() ?>
3 <?cs /def ?><?cs
8 <?cs /def ?><?cs
10 # The default side navigation for the reference docs ?><?cs
20 <?cs if:reference.gcm || reference.gms ?>
21 <?cs include:"../../../../frameworks/base/docs/html/google/google_toc.cs" ?>
25 <?cs else ?>
40 var SINCE_DATA = [ <?cs
42 var:since.name ?>'<?cs
43 if:!last(since) ?>, <?cs /if ?><?cs
[all …]
Ddocpage.cs1 <?cs if:!devsite ?><?cs
2 include:"doctype.cs" ?><?cs /if ?><?cs
3 include:"macros.cs" ?><html<?cs if:devsite ?> devsite<?cs /if ?>>
4 <?cs include:"head_tag.cs" ?>
5 <body<?cs
42 /if ?>" itemscope itemtype="http://schema.org/Article"><?cs
43 /if ?>><?cs
44 include:"header.cs" ?><?cs
46 if:(design||training||walkthru) && !page.trainingcourse && !page.article ?><?cs
47 # header logic for docs that provide previous/next buttons ?><?cs
[all …]
Dpackage.cs1 <?cs # THIS CREATES A PACKAGE SUMMARY PAGE FROM EACH package.html FILES
3 <?cs include:"macros.cs" ?>
4 <?cs include:"macros_override.cs" ?>
5 <?cs include:"doctype.cs" ?>
6 <html<?cs if:devsite ?> devsite<?cs /if ?>>
7 <?cs include:"head_tag.cs" ?>
8 <?cs include:"body_tag.cs" ?>
12 <?cs if:(dac&&package.since)
13 ?><meta itemprop="path" content="API level <?cs var:package.since ?>" /><?cs
15 <?cs include:"header.cs" ?>
[all …]
Dclasses.cs1 <?cs # THIS CREATES A LIST OF ALL PACKAGES AND NAMES IT packages.html ?>
2 <?cs include:"macros.cs" ?>
3 <?cs include:"macros_override.cs" ?>
4 <?cs include:"doctype.cs" ?>
5 <html<?cs if:devsite ?> devsite<?cs /if ?>>
6 <?cs include:"head_tag.cs" ?>
7 <?cs include:"body_tag.cs" ?>
8 <?cs include:"header.cs" ?>
10 <h1><?cs var:page.title ?></h1>
14 <?cs each:letter=docs.classes ?>
[all …]
Dsampleindex.cs1 <?cs include:"doctype.cs" ?>
2 <?cs include:"macros.cs" ?>
3 <html<?cs if:devsite ?> devsite<?cs /if ?>>
4 <?cs include:"head_tag.cs" ?>
6 <?cs include:"header.cs" ?>
13 <?cs if:projectStructure ?>
15 &#124; Project<?cs else ?>Overview
17 <?cs /if ?>
26 <h1 itemprop="name"><?cs var:projectDir ?></h1>
29 <?cs def:display_files(files) ?>
[all …]
Dpackages.cs1 <?cs # THIS CREATES A LIST OF ALL PACKAGES AND NAMES IT packages.html ?>
2 <?cs include:"macros.cs" ?>
3 <?cs include:"doctype.cs" ?>
4 <html<?cs if:devsite ?> devsite<?cs /if ?>>
5 <?cs include:"head_tag.cs" ?>
6 <?cs include:"body_tag.cs" ?>
7 <?cs include:"header.cs" ?>
9 <h1><?cs var:page.title ?></h1>
13 <?cs set:count = #1 ?>
15 <?cs each:pkg = docs.packages ?>
[all …]
Dsample.cs1 <?cs include:"doctype.cs" ?>
2 <?cs include:"macros.cs" ?>
3 <html<?cs if:devsite ?> devsite<?cs /if ?>>
4 <?cs include:"head_tag.cs" ?>
6 <?cs include:"header.cs" ?>
26 <?cs each:item = parentdirs ?>
27 <?cs if:LinkifyPathCrumb
28 ?><a href="<?cs var:toroot ?><?cs var:item.Link ?>"><?cs var:item.Name ?></a> /
29 <?cs else
30 ?><?cs var:item.Name ?> / <?cs /if ?>
[all …]
Dhead_tag.cs2 <title><?cs
3 if:devsite ?><?cs
4 if:page.title ?><?cs
5 var:html_strip(page.title) ?><?cs
6 else ?>Android Developers<?cs
7 /if ?><?cs
8 else ?><?cs
9 if:page.title ?><?cs
10 var:page.title ?> | <?cs
12 <?cs /if ?><?cs
[all …]
/external/iptables/iptables/
Dnft-ipv6.c30 struct iptables_command_state *cs = data; in nft_ipv6_add() local
35 if (cs->fw6.ipv6.iniface[0] != '\0') { in nft_ipv6_add()
36 op = nft_invflags2cmp(cs->fw6.ipv6.invflags, IPT_INV_VIA_IN); in nft_ipv6_add()
37 add_iniface(r, cs->fw6.ipv6.iniface, op); in nft_ipv6_add()
40 if (cs->fw6.ipv6.outiface[0] != '\0') { in nft_ipv6_add()
41 op = nft_invflags2cmp(cs->fw6.ipv6.invflags, IPT_INV_VIA_OUT); in nft_ipv6_add()
42 add_outiface(r, cs->fw6.ipv6.outiface, op); in nft_ipv6_add()
45 if (cs->fw6.ipv6.proto != 0) { in nft_ipv6_add()
46 op = nft_invflags2cmp(cs->fw6.ipv6.invflags, XT_INV_PROTO); in nft_ipv6_add()
48 cs->fw6.ipv6.proto, op); in nft_ipv6_add()
[all …]
Dnft-ipv4.c31 struct iptables_command_state *cs = data; in nft_ipv4_add() local
36 if (cs->fw.ip.iniface[0] != '\0') { in nft_ipv4_add()
37 op = nft_invflags2cmp(cs->fw.ip.invflags, IPT_INV_VIA_IN); in nft_ipv4_add()
38 add_iniface(r, cs->fw.ip.iniface, op); in nft_ipv4_add()
41 if (cs->fw.ip.outiface[0] != '\0') { in nft_ipv4_add()
42 op = nft_invflags2cmp(cs->fw.ip.invflags, IPT_INV_VIA_OUT); in nft_ipv4_add()
43 add_outiface(r, cs->fw.ip.outiface, op); in nft_ipv4_add()
46 if (cs->fw.ip.proto != 0) { in nft_ipv4_add()
47 op = nft_invflags2cmp(cs->fw.ip.invflags, XT_INV_PROTO); in nft_ipv4_add()
49 cs->fw.ip.proto, op); in nft_ipv4_add()
[all …]
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_cs.c107 csc->cs.chunks = (uint64_t)(uintptr_t)csc->chunk_array; in radeon_init_cs_context()
156 struct radeon_drm_cs *cs; in radeon_drm_cs_create() local
158 cs = CALLOC_STRUCT(radeon_drm_cs); in radeon_drm_cs_create()
159 if (!cs) { in radeon_drm_cs_create()
162 util_queue_fence_init(&cs->flush_completed); in radeon_drm_cs_create()
164 cs->ws = ws; in radeon_drm_cs_create()
165 cs->flush_cs = flush; in radeon_drm_cs_create()
166 cs->flush_data = flush_ctx; in radeon_drm_cs_create()
168 if (!radeon_init_cs_context(&cs->csc1, cs->ws)) { in radeon_drm_cs_create()
169 FREE(cs); in radeon_drm_cs_create()
[all …]
/external/mesa3d/src/amd/vulkan/
Dradv_cs.h34 struct radeon_winsys_cs *cs, in radeon_check_space() argument
37 if (cs->max_dw - cs->cdw < needed) in radeon_check_space()
38 ws->cs_grow(cs, needed); in radeon_check_space()
39 return cs->cdw + needed; in radeon_check_space()
42 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned nu… in radeon_set_config_reg_seq() argument
45 assert(cs->cdw + 2 + num <= cs->max_dw); in radeon_set_config_reg_seq()
47 radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); in radeon_set_config_reg_seq()
48 radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2); in radeon_set_config_reg_seq()
51 static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_config_reg() argument
53 radeon_set_config_reg_seq(cs, reg, 1); in radeon_set_config_reg()
[all …]
Dsi_cmd_buffer.c40 struct radeon_winsys_cs *cs, in si_write_harvested_raster_configs() argument
150 radeon_set_config_reg(cs, R_00802C_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
155 radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
158 radeon_set_context_reg(cs, R_028350_PA_SC_RASTER_CONFIG, raster_config_se); in si_write_harvested_raster_configs()
160 radeon_set_context_reg(cs, R_028354_PA_SC_RASTER_CONFIG_1, raster_config_1); in si_write_harvested_raster_configs()
165 radeon_set_config_reg(cs, R_00802C_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
170 radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
177 struct radeon_winsys_cs *cs) in si_emit_compute() argument
179 radeon_set_sh_reg_seq(cs, R_00B810_COMPUTE_START_X, 3); in si_emit_compute()
180 radeon_emit(cs, 0); in si_emit_compute()
[all …]
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_cs.c163 struct radv_amdgpu_cs *cs = radv_amdgpu_cs(rcs); in radv_amdgpu_cs_destroy() local
165 if (cs->ib_buffer) in radv_amdgpu_cs_destroy()
166 cs->ws->base.buffer_destroy(cs->ib_buffer); in radv_amdgpu_cs_destroy()
168 free(cs->base.buf); in radv_amdgpu_cs_destroy()
170 for (unsigned i = 0; i < cs->num_old_ib_buffers; ++i) in radv_amdgpu_cs_destroy()
171 cs->ws->base.buffer_destroy(cs->old_ib_buffers[i]); in radv_amdgpu_cs_destroy()
173 for (unsigned i = 0; i < cs->num_old_cs_buffers; ++i) { in radv_amdgpu_cs_destroy()
174 struct radeon_winsys_cs *rcs = &cs->old_cs_buffers[i]; in radv_amdgpu_cs_destroy()
178 free(cs->old_cs_buffers); in radv_amdgpu_cs_destroy()
179 free(cs->old_ib_buffers); in radv_amdgpu_cs_destroy()
[all …]
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_cs.c236 struct amdgpu_cs *cs = amdgpu_cs(rcs); in amdgpu_cs_get_next_fence() local
242 if (cs->next_fence) { in amdgpu_cs_get_next_fence()
243 amdgpu_fence_reference(&fence, cs->next_fence); in amdgpu_cs_get_next_fence()
247 fence = amdgpu_fence_create(cs->ctx, in amdgpu_cs_get_next_fence()
248 cs->csc->ib[IB_MAIN].ip_type, in amdgpu_cs_get_next_fence()
249 cs->csc->ib[IB_MAIN].ip_instance, in amdgpu_cs_get_next_fence()
250 cs->csc->ib[IB_MAIN].ring); in amdgpu_cs_get_next_fence()
254 amdgpu_fence_reference(&cs->next_fence, fence); in amdgpu_cs_get_next_fence()
350 static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs) in amdgpu_cs_has_user_fence() argument
352 return cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD && in amdgpu_cs_has_user_fence()
[all …]
/external/mesa3d/src/gallium/drivers/r600/
Dr600_cs.h45 struct radeon_winsys_cs *cs, in radeon_cs_memory_below_limit() argument
48 vram += cs->used_vram; in radeon_cs_memory_below_limit()
49 gtt += cs->used_gart; in radeon_cs_memory_below_limit()
77 ring->cs, rbo->buf, in radeon_add_to_buffer_list()
108 !radeon_cs_memory_below_limit(rctx->screen, ring->cs, in radeon_add_to_buffer_list_check_mem()
121 struct radeon_winsys_cs *cs = ring->cs; in r600_emit_reloc() local
126 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_reloc()
127 radeon_emit(cs, reloc); in r600_emit_reloc()
131 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned nu… in radeon_set_config_reg_seq() argument
134 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_config_reg_seq()
[all …]
Dcayman_msaa.c144 void cayman_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples) in cayman_emit_msaa_sample_locs() argument
149 radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0); in cayman_emit_msaa_sample_locs()
150 radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0); in cayman_emit_msaa_sample_locs()
151 radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0); in cayman_emit_msaa_sample_locs()
152 radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0); in cayman_emit_msaa_sample_locs()
155 radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]); in cayman_emit_msaa_sample_locs()
156 radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]); in cayman_emit_msaa_sample_locs()
157 radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]); in cayman_emit_msaa_sample_locs()
158 radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]); in cayman_emit_msaa_sample_locs()
161 radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]); in cayman_emit_msaa_sample_locs()
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_cs.h43 struct radeon_winsys_cs *cs, in radeon_cs_memory_below_limit() argument
46 vram += cs->used_vram; in radeon_cs_memory_below_limit()
47 gtt += cs->used_gart; in radeon_cs_memory_below_limit()
75 ring->cs, rbo->buf, in radeon_add_to_buffer_list()
106 !radeon_cs_memory_below_limit(rctx->screen, ring->cs, in radeon_add_to_buffer_list_check_mem()
114 static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned nu… in radeon_set_config_reg_seq() argument
117 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_config_reg_seq()
118 radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); in radeon_set_config_reg_seq()
119 radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2); in radeon_set_config_reg_seq()
122 static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) in radeon_set_config_reg() argument
[all …]
/external/u-boot/board/freescale/corenet_ds/
Dp4080ds_ddr.c78 .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
79 .cs[1].bnds = CONFIG_SYS_DDR_CS1_BNDS,
80 .cs[2].bnds = CONFIG_SYS_DDR_CS2_BNDS,
81 .cs[3].bnds = CONFIG_SYS_DDR_CS3_BNDS,
82 .cs[0].config = CONFIG_SYS_DDR_CS0_CONFIG,
83 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
84 .cs[1].config = CONFIG_SYS_DDR_CS1_CONFIG,
85 .cs[2].config = CONFIG_SYS_DDR_CS2_CONFIG,
86 .cs[3].config = CONFIG_SYS_DDR_CS3_CONFIG,
110 .cs[0].bnds = CONFIG_SYS_DDR2_CS0_BNDS,
[all …]
/external/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_state.c49 struct compiled_stencil_ref *cs = &ctx->stencil_ref; in etna_set_stencil_ref() local
53 cs->PE_STENCIL_CONFIG = VIVS_PE_STENCIL_CONFIG_REF_FRONT(sr->ref_value[0]); in etna_set_stencil_ref()
55 cs->PE_STENCIL_CONFIG_EXT = in etna_set_stencil_ref()
118 struct compiled_framebuffer_state *cs = &ctx->framebuffer; in etna_set_framebuffer_state() local
133 pipe_surface_reference(&cs->cbuf, &cbuf->base); in etna_set_framebuffer_state()
134 cs->PE_COLOR_FORMAT = in etna_set_framebuffer_state()
156 cs->PE_COLOR_ADDR = cbuf->reloc[0]; in etna_set_framebuffer_state()
157 cs->PE_COLOR_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; in etna_set_framebuffer_state()
162 cs->PE_PIPE_COLOR_ADDR[i] = cbuf->reloc[i]; in etna_set_framebuffer_state()
163 cs->PE_PIPE_COLOR_ADDR[i].flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; in etna_set_framebuffer_state()
[all …]

12345678910>>...108