Searched refs:ddr_clk (Results 1 – 9 of 9) sorted by relevance
/external/u-boot/drivers/video/rockchip/ |
D | rk_mipi.c | 206 u64 ddr_clk = priv->phy_clk; in rk_mipi_phy_enable() local 233 test_data[0] = 0x80 | (ddr_clk / (200 * MHz)) << 3 | 0x3; in rk_mipi_phy_enable() 244 if (ddr_clk / (MHz) >= freq_rang[i][0]) in rk_mipi_phy_enable() 274 if ((ddr_clk * i % refclk < remain) && in rk_mipi_phy_enable() 275 (ddr_clk * i / refclk) < max_fbdiv) { in rk_mipi_phy_enable() 277 remain = ddr_clk * i % refclk; in rk_mipi_phy_enable() 280 fbdiv = ddr_clk * prediv / refclk; in rk_mipi_phy_enable() 281 ddr_clk = refclk * fbdiv / prediv; in rk_mipi_phy_enable() 282 priv->phy_clk = ddr_clk; in rk_mipi_phy_enable() 285 __func__, refclk, prediv, fbdiv, ddr_clk); in rk_mipi_phy_enable()
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/external/u-boot/drivers/ram/stm32mp1/ |
D | stm32mp1_ram.c | 26 unsigned long ddr_clk; in stm32mp1_ddr_clk_enable() local 49 ddr_clk = abs(ddrphy_clk - mem_speed * 1000 * 1000); in stm32mp1_ddr_clk_enable() 50 if (ddr_clk > (mem_speed * 1000 * 100)) { in stm32mp1_ddr_clk_enable()
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/external/u-boot/arch/arm/mach-omap2/ |
D | clocks-common.c | 269 u32 ddr_clk, sys_clk_khz, omap_rev, divider; in omap_ddr_clk() local 280 ddr_clk = sys_clk_khz * 2 * core_dpll_params->m / in omap_ddr_clk() 297 ddr_clk = ddr_clk / divider / core_dpll_params->m2; in omap_ddr_clk() 298 ddr_clk *= 1000; /* convert to Hz */ in omap_ddr_clk() 299 debug("ddr_clk %d\n ", ddr_clk); in omap_ddr_clk() 301 return ddr_clk; in omap_ddr_clk()
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/external/u-boot/arch/arm/mach-aspeed/ast2500/ |
D | sdram_ast2500.c | 68 struct clk ddr_clk; member 334 int ret = clk_get_by_index(dev, 0, &priv->ddr_clk); in ast2500_sdrammc_probe() 347 clk_set_rate(&priv->ddr_clk, priv->clock_rate); in ast2500_sdrammc_probe()
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/external/u-boot/drivers/ram/rockchip/ |
D | sdram_rk322x.c | 35 struct clk ddr_clk; member 690 ret = clk_set_rate(&dram->ddr_clk, in sdram_init() 802 priv->ddr_clk.id = CLK_DDR; in rk322x_dmc_probe() 803 ret = clk_request(dev_clk, &priv->ddr_clk); in rk322x_dmc_probe()
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D | dmc-rk3368.c | 24 struct clk ddr_clk; member 807 ret = clk_set_rate(&priv->ddr_clk, 2 * params->ddr_freq); in setup_sdram() 939 priv->ddr_clk.id = CLK_DDR; in rk3368_dmc_probe() 940 ret = clk_request(dev_clk, &priv->ddr_clk); in rk3368_dmc_probe()
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D | sdram_rk3188.c | 36 struct clk ddr_clk; member 722 ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq); in sdram_init() 906 priv->ddr_clk.id = CLK_DDR; in rk3188_dmc_probe() 907 ret = clk_request(dev_clk, &priv->ddr_clk); in rk3188_dmc_probe()
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D | sdram_rk3399.c | 35 struct clk ddr_clk; member 1165 ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->ddr_clk); in rk3399_dmc_init() 1167 ret = clk_get_by_index(dev, 0, &priv->ddr_clk); in rk3399_dmc_init() 1173 ret = clk_set_rate(&priv->ddr_clk, params->base.ddr_freq * MHz); in rk3399_dmc_init()
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D | sdram_rk3288.c | 38 struct clk ddr_clk; member 797 ret = clk_set_rate(&dram->ddr_clk, sdram_params->base.ddr_freq); in sdram_init() 1071 priv->ddr_clk.id = CLK_DDR; in rk3288_dmc_probe() 1072 ret = clk_request(dev_clk, &priv->ddr_clk); in rk3288_dmc_probe()
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