/external/llvm/lib/Target/Hexagon/ |
D | HexagonOptAddrMode.cpp | 119 if (HII->getAddrMode(MI) == HexagonII::BaseRegOffset) in INITIALIZE_PASS_DEPENDENCY() 122 else if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset) in INITIALIZE_PASS_DEPENDENCY() 174 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset || in canRemoveAddasl() 316 if (HII->getAddrMode(OldMI) == HexagonII::BaseRegOffset) { in changeLoad() 326 } else if (HII->getAddrMode(OldMI) == HexagonII::BaseImmOffset) { in changeLoad() 373 if (HII->getAddrMode(OldMI) == HexagonII::BaseRegOffset) { in changeStore() 382 } else if (HII->getAddrMode(OldMI) == HexagonII::BaseImmOffset) { in changeStore() 415 if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset) { in getBaseWithLongOffset() 445 assert(HII->getAddrMode(UseMI) == HexagonII::BaseImmOffset); in changeAddAsl()
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D | HexagonInstrInfo.h | 373 unsigned getAddrMode(const MachineInstr* MI) const;
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D | HexagonRDFOpt.cpp | 207 if (HII.getAddrMode(MI) != HexagonII::PostInc) in rewrite()
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D | HexagonInstrInfo.cpp | 1702 return (getAddrMode(MI) == HexagonII::AbsoluteSet); in isAbsoluteSet() 2378 return getAddrMode(MI) == HexagonII::PostInc; in isPostIncrement() 2995 switch (getAddrMode(MI)) { in hasNonExtEquivalent() 3138 unsigned HexagonInstrInfo::getAddrMode(const MachineInstr* MI) const { in getAddrMode() function in HexagonInstrInfo 3149 if (getAddrMode(MI) != HexagonII::BaseImmOffset && in getBaseAndOffset() 3150 getAddrMode(MI) != HexagonII::BaseLongOffset && in getBaseAndOffset() 4088 switch (getAddrMode(MI)) { in getNonExtOpcode()
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D | HexagonFrameLowering.cpp | 1945 unsigned AM = HII.getAddrMode(&In); in optimizeSpillSlots() 2157 assert(HII.getAddrMode(MI) == HexagonII::BaseImmOffset); in optimizeSpillSlots()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonOptAddrMode.cpp | 138 if (HII->getAddrMode(MI) == HexagonII::BaseRegOffset) in INITIALIZE_PASS_DEPENDENCY() 141 else if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset) in INITIALIZE_PASS_DEPENDENCY() 196 HII->getAddrMode(UseMI) != HexagonII::BaseImmOffset || in canRemoveAddasl() 359 HII->getAddrMode(*MI) != HexagonII::BaseImmOffset || in processAddUses() 495 if (HII->getAddrMode(*OldMI) == HexagonII::BaseRegOffset) { in changeLoad() 505 } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset) { in changeLoad() 552 if (HII->getAddrMode(*OldMI) == HexagonII::BaseRegOffset) { in changeStore() 561 } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset) { in changeStore() 593 if (HII->getAddrMode(MI) == HexagonII::BaseImmOffset) { in getBaseWithLongOffset() 623 assert(HII->getAddrMode(*UseMI) == HexagonII::BaseImmOffset); in changeAddAsl()
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D | HexagonSubtarget.cpp | 277 HII.getAddrMode(L0) != HexagonII::BaseImmOffset) in apply() 290 HII.getAddrMode(L1) != HexagonII::BaseImmOffset) in apply()
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D | HexagonRDFOpt.cpp | 221 if (HII.getAddrMode(MI) != HexagonII::PostInc) in rewrite()
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D | HexagonInstrInfo.h | 438 unsigned getAddrMode(const MachineInstr &MI) const;
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D | HexagonInstrInfo.cpp | 1493 return getAddrMode(MI) == HexagonII::PostInc; in isPostIncrement() 1948 return (getAddrMode(MI) == HexagonII::AbsoluteSet); in isAbsoluteSet() 1957 return getAddrMode(MI) == HexagonII::BaseImmOffset; in isBaseImmOffset() 2946 switch (getAddrMode(MI)) { in hasNonExtEquivalent() 3093 unsigned HexagonInstrInfo::getAddrMode(const MachineInstr &MI) const { in getAddrMode() function in HexagonInstrInfo 3105 if (getAddrMode(MI) != HexagonII::BaseImmOffset && in getBaseAndOffset() 3106 getAddrMode(MI) != HexagonII::BaseLongOffset && in getBaseAndOffset() 4189 switch (getAddrMode(MI)) { in getNonExtOpcode()
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D | HexagonConstExtenders.cpp | 1163 unsigned AM = HII->getAddrMode(MI); in recordExtender() 1647 unsigned AM = HII->getAddrMode(MI); in replaceInstrExact() 1835 unsigned AM = HII->getAddrMode(MI); in replaceInstr()
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D | HexagonFrameLowering.cpp | 2051 unsigned AM = HII.getAddrMode(In); in optimizeSpillSlots() 2278 assert(HII.getAddrMode(MI) == HexagonII::BaseImmOffset); in optimizeSpillSlots()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCInstrInfo.h | 115 unsigned getAddrMode(MCInstrInfo const &MCII, MCInst const &MCI);
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D | HexagonMCChecker.cpp | 469 HexagonMCInstrInfo::getAddrMode(MCII, *std::get<0>(Producer)); in checkNewValues()
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D | HexagonMCInstrInfo.cpp | 218 unsigned HexagonMCInstrInfo::getAddrMode(MCInstrInfo const &MCII, in getAddrMode() function in HexagonMCInstrInfo
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/external/spirv-llvm/lib/SPIRV/libSPIRV/ |
D | SPIRVValue.h | 316 SPIRVWord getAddrMode() const { in getAddrMode() function
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/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringARM32.cpp | 2016 Mem->getShiftAmt(), Mem->getAddrMode()); in legalizeMemOperand() 2107 assert(Mem->getAddrMode() == OperandARM32Mem::Offset || in loOperand() 2108 Mem->getAddrMode() == OperandARM32Mem::NegOffset); in loOperand() 2113 Mem->getAddrMode()); in loOperand() 2116 Mem->getOffset(), Mem->getAddrMode()); in loOperand() 2136 assert(Mem->getAddrMode() == OperandARM32Mem::Offset || in hiOperand() 2137 Mem->getAddrMode() == OperandARM32Mem::NegOffset); in hiOperand() 2152 Mem->getAddrMode()); in hiOperand() 2176 Mem->getAddrMode()); in hiOperand() 6395 Mem->getAddrMode()); in legalize() [all …]
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D | IceInstMIPS32.h | 137 AddrMode getAddrMode() const { return Mode; } in getAddrMode() function 163 if (getAddrMode() == Offset) { in dump()
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D | IceTargetLoweringMIPS32.cpp | 2255 assert(Mem->getAddrMode() == OperandMIPS32Mem::Offset); in loOperand() 2257 Mem->getOffset(), Mem->getAddrMode()); in loOperand() 2271 assert(Mem->getAddrMode() == OperandMIPS32Mem::Offset); in getOperandAtIndex() 2289 Mem->getAddrMode()); in getOperandAtIndex() 2312 assert(Mem->getAddrMode() == OperandMIPS32Mem::Offset); in hiOperand() 2335 Mem->getAddrMode()); in hiOperand() 5934 Mem->getAddrMode()); in legalize()
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D | IceInstARM32.cpp | 3288 switch (getAddrMode()) { in emit() 3313 switch (getAddrMode()) { in emit() 3353 Str << "] AddrMode==" << getAddrMode(); in dump()
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D | IceInstARM32.h | 125 AddrMode getAddrMode() const { return Mode; } in getAddrMode() function
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D | IceAssemblerARM32.cpp | 506 Value = (Rn << kRnShift) | Mem->getAddrMode() | in encodeAddress() 514 Mem->getAddrMode()); in encodeAddress()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | CodeGenPrepare.cpp | 2758 const ExtAddrMode &getAddrMode() const { in getAddrMode() function in __anon783ecff20611::AddressingModeCombiner 4442 ExtAddrMode AddrMode = AddrModes.getAddrMode(); in optimizeMemoryInst()
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/external/spirv-llvm/lib/SPIRV/ |
D | SPIRVReader.cpp | 1277 auto Lit = (BCS->getAddrMode() << 1) | in oclTransConstantSampler()
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