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Searched refs:getUndefRegState (Results 1 – 25 of 27) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
DSILowerControlFlow.cpp453 .addReg(IdxReg.getReg(), getUndefRegState(IdxReg.isUndef())); in emitLoadM0FromVGPRLoop()
462 .addReg(IdxReg.getReg(), getUndefRegState(IdxReg.isUndef())); in emitLoadM0FromVGPRLoop()
536 .addReg(Idx->getReg(), getUndefRegState(Idx->isUndef())) in loadM0()
540 .addReg(Idx->getReg(), getUndefRegState(Idx->isUndef())); in loadM0()
643 .addReg(Reg, getUndefRegState(SrcVec->isUndef())); in indirectSrc()
650 .addReg(Reg, getUndefRegState(SrcVec->isUndef())) in indirectSrc()
679 .addReg(Val->getReg(), getUndefRegState(Val->isUndef())) in indirectDst()
/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h384 inline unsigned getUndefRegState(bool B) { in getUndefRegState() function
401 getUndefRegState(RegOp.isUndef()) | in getRegState()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h465 inline unsigned getUndefRegState(bool B) { in getUndefRegState() function
485 getUndefRegState(RegOp.isUndef()) | in getRegState()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineInstrBuilder.h258 inline unsigned getUndefRegState(bool B) { in getUndefRegState() function
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp1057 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1062 .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef)) in InsertLDR_STR()
1063 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1118 getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef)) in FixInvalidRegPairOp()
1120 getKillRegState(OddDeadKill) | getUndefRegState(OddUndef)); in FixInvalidRegPairOp()
DARMExpandPseudoInsts.cpp577 unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | in ExpandLaneOp()
/external/llvm/lib/CodeGen/
DMachineInstrBundle.cpp213 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | in finalizeBundle()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DMachineInstrBundle.cpp215 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | in finalizeBundle()
DSplitKit.cpp519 .addReg(ToReg, RegState::Define | getUndefRegState(FirstCopy) in buildSingleSubRegCopy()
/external/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp484 MIB.addReg(D0, getUndefRegState(SrcIsUndef)); in ExpandVST()
486 MIB.addReg(D1, getUndefRegState(SrcIsUndef)); in ExpandVST()
488 MIB.addReg(D2, getUndefRegState(SrcIsUndef)); in ExpandVST()
490 MIB.addReg(D3, getUndefRegState(SrcIsUndef)); in ExpandVST()
567 unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | in ExpandLaneOp()
DARMLoadStoreOptimizer.cpp1561 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1566 .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef)) in InsertLDR_STR()
1567 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1631 getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef)) in FixInvalidRegPairOp()
1633 getKillRegState(OddDeadKill) | getUndefRegState(OddUndef)); in FixInvalidRegPairOp()
DARMBaseInstrInfo.cpp4354 .addReg(DReg, getUndefRegState(!MI.readsRegister(DReg, TRI))) in setExecutionDomain()
4390 .addReg(DDst, getUndefRegState(!MI.readsRegister(DDst, TRI))) in setExecutionDomain()
4424 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4428 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4443 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4447 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp1601 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1606 .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef)) in InsertLDR_STR()
1607 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1673 getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef)) in FixInvalidRegPairOp()
1675 getKillRegState(OddDeadKill) | getUndefRegState(OddUndef)); in FixInvalidRegPairOp()
DARMExpandPseudoInsts.cpp629 MIB.addReg(D0, getUndefRegState(SrcIsUndef)); in ExpandVST()
631 MIB.addReg(D1, getUndefRegState(SrcIsUndef)); in ExpandVST()
633 MIB.addReg(D2, getUndefRegState(SrcIsUndef)); in ExpandVST()
635 MIB.addReg(D3, getUndefRegState(SrcIsUndef)); in ExpandVST()
712 unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | in ExpandLaneOp()
DARMBaseInstrInfo.cpp4752 .addReg(DReg, getUndefRegState(!MI.readsRegister(DReg, TRI))) in setExecutionDomain()
4788 .addReg(DDst, getUndefRegState(!MI.readsRegister(DDst, TRI))) in setExecutionDomain()
4822 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4826 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
4840 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
4844 MIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp91 unsigned Reg128Undef = getUndefRegState(LowRegOp.isUndef()); in splitMove()
294 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)); in emitGRX32Move()
299 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)) in emitGRX32Move()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp554 .addReg(DefReg, getUndefRegState(DefMO.isDead())); in MoveAndTeeForMultiUse()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp589 .addReg(DefReg, getUndefRegState(DefMO.isDead())); in MoveAndTeeForMultiUse()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp615 unsigned Flags1 = getUndefRegState(Cond[1].isUndef()); in InsertBranch()
618 unsigned Flags2 = getUndefRegState(Cond[2].isUndef()); in InsertBranch()
629 unsigned Flags = getUndefRegState(RO.isUndef()); in InsertBranch()
652 unsigned Flags = getUndefRegState(RO.isUndef()); in InsertBranch()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp631 unsigned Flags1 = getUndefRegState(Cond[1].isUndef()); in insertBranch()
635 unsigned Flags2 = getUndefRegState(Cond[2].isUndef()); in insertBranch()
646 unsigned Flags = getUndefRegState(RO.isUndef()); in insertBranch()
670 unsigned Flags = getUndefRegState(RO.isUndef()); in insertBranch()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86FrameLowering.cpp166 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); in emitSPUpdate()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrInfo.cpp969 .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) in convertToThreeAddress()
1011 getKillRegState(isKill) | getUndefRegState(isUndef)); in convertToThreeAddress()
1041 .addReg(SrcReg, getUndefRegState(isUndef) | in convertToThreeAddress()
1146 .addReg(SrcReg, getUndefRegState(isUndef) | in convertToThreeAddress()
5431 getUndefRegState(ImpOp.isUndef())); in unfoldMemoryOperand()
DX86FrameLowering.cpp332 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)) in emitSPUpdate()
/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp2815 .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) in convertToThreeAddress()
2857 getKillRegState(isKill) | getUndefRegState(isUndef)); in convertToThreeAddress()
2889 .addReg(SrcReg, getUndefRegState(isUndef) | in convertToThreeAddress()
2999 .addReg(SrcReg, getUndefRegState(isUndef) | in convertToThreeAddress()
6439 getUndefRegState(ImpOp.isUndef())); in unfoldMemoryOperand()
DX86FrameLowering.cpp297 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); in emitSPUpdate()

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