/external/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 62 jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0x80,0x05,0x01,0x00]
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/external/llvm/lib/Target/Mips/ |
D | Mips64r6InstrInfo.td | 79 class JIALC64_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
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D | Mips32r6InstrInfo.td | 451 class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
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D | MicroMips32r6InstrInfo.td | 474 class JIALC_MMR6_DESC : JMP_MMR6_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 77 jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0x80,0x05,0x01,0x00]
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/external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
D | valid-mips32r6-el.txt | 162 0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
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D | valid-mips32r6.txt | 189 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r6/ |
D | valid-mips32r6-el.txt | 171 0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
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D | valid-mips32r6.txt | 199 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
D | valid-mips64r6-el.txt | 123 0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
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D | valid-mips64r6.txt | 214 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | Mips64r6InstrInfo.td | 94 class JIALC64_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
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D | MipsScheduleGeneric.td | 157 // jalr, jr.hb, jr, jalr.hb, jarlc, jialc
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D | Mips32r6InstrInfo.td | 491 class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
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D | MicroMips32r6InstrInfo.td | 477 class JIALC_MMR6_DESC : JMP_MMR6_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/ |
D | valid-mips64r6-el.txt | 128 0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
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D | valid-mips64r6.txt | 224 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 73 0x80 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 77 0x80 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/v8/src/mips/ |
D | macro-assembler-mips.cc | 3805 jialc(target, offset); in Call() 3809 jialc(target, offset); in Call() 3835 jialc(base, offset); in Call() 3839 jialc(base, offset); in Call()
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D | assembler-mips.h | 819 void jialc(Register rt, int16_t offset);
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D | assembler-mips.cc | 1894 void Assembler::jialc(Register rt, int16_t offset) { in jialc() function in v8::internal::Assembler
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenAsmMatcher.inc | 4934 "\005jalrc\010jalrc.hb\005jalrs\007jalrs16\004jals\004jalx\005jialc\003j" 6392 …{ 5329 /* jialc */, Mips::JIALC, Convert__GPR32AsmReg1_0__JumpTarget1_1, Feature_HasStdEnc|Feature… 6393 …{ 5329 /* jialc */, Mips::JIALC_MMR6, Convert__GPR32AsmReg1_0__JumpTarget1_1, Feature_InMicroMips|… 6394 …{ 5329 /* jialc */, Mips::JIALC64, Convert__GPR64AsmReg1_0__JumpTarget1_1, Feature_HasStdEnc|Featu… 9613 { Feature_HasStdEnc|Feature_HasMips32r6, 5329 /* jialc */, MCK_GPR32AsmReg, 1 /* 0 */ }, 9614 { Feature_HasStdEnc|Feature_HasMips32r6, 5329 /* jialc */, MCK_JumpTarget, 2 /* 1 */ }, 9615 { Feature_InMicroMips|Feature_HasMips32r6, 5329 /* jialc */, MCK_GPR32AsmReg, 1 /* 0 */ }, 9616 { Feature_InMicroMips|Feature_HasMips32r6, 5329 /* jialc */, MCK_JumpTarget, 2 /* 1 */ }, 9617 …{ Feature_HasStdEnc|Feature_IsGP64bit|Feature_HasMips64r6, 5329 /* jialc */, MCK_GPR64AsmReg, 1 /*… 9618 …{ Feature_HasStdEnc|Feature_IsGP64bit|Feature_HasMips64r6, 5329 /* jialc */, MCK_JumpTarget, 2 /* …
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/external/v8/src/mips64/ |
D | macro-assembler-mips64.cc | 4229 jialc(target, 0); in Call() 4233 jialc(target, 0); in Call()
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D | assembler-mips64.h | 831 void jialc(Register rt, int16_t offset);
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