| /external/u-boot/arch/arm/mach-omap2/omap3/ |
| D | sys_info.c | 245 char *cpu_family_s, *cpu_s, *sec_s, *max_clk; in print_cpuinfo() local
269 max_clk = "720 MHz"; in print_cpuinfo()
271 max_clk = "600 MHz"; in print_cpuinfo()
287 max_clk = "600 MHz"; in print_cpuinfo()
294 max_clk = "800 MHz"; in print_cpuinfo()
299 max_clk = "1 GHz"; in print_cpuinfo()
304 max_clk = "800 MHz"; in print_cpuinfo()
309 max_clk = "1 GHz"; in print_cpuinfo()
314 max_clk = "800 MHz"; in print_cpuinfo()
319 max_clk = "1 GHz"; in print_cpuinfo()
[all …]
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| /external/u-boot/drivers/mmc/ |
| D | atmel_sdhci.c | 21 u32 max_clk, min_clk = ATMEL_SDHC_MIN_FREQ; in atmel_sdhci_init() local
32 max_clk = at91_get_periph_generated_clk(id); in atmel_sdhci_init()
33 if (!max_clk) { in atmel_sdhci_init()
38 host->max_clk = max_clk; in atmel_sdhci_init()
59 u32 max_clk; in atmel_sdhci_probe() local
86 max_clk = clk_get_rate(&clk); in atmel_sdhci_probe()
87 if (!max_clk) in atmel_sdhci_probe()
90 host->max_clk = max_clk; in atmel_sdhci_probe()
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| D | kona_sdhci.c | 80 u32 max_clk; in kona_sdhci_init() local
93 &max_clk); in kona_sdhci_init()
98 &max_clk); in kona_sdhci_init()
103 &max_clk); in kona_sdhci_init()
108 &max_clk); in kona_sdhci_init()
123 host->max_clk = max_clk; in kona_sdhci_init()
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| D | sdhci.c | 363 if ((host->max_clk / div) <= clock)
375 if (host->max_clk <= clock) {
381 if ((host->max_clk / div) <= clock)
390 if ((host->max_clk / div) <= clock)
592 if (host->max_clk == 0) {
594 host->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
597 host->max_clk = (caps & SDHCI_CLOCK_BASE_MASK) >>
599 host->max_clk *= 1000000;
601 host->max_clk *= host->clk_mul;
603 if (host->max_clk == 0) {
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| D | mv_sdhci.c | 67 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks) in mv_sdh_init() argument
79 host->max_clk = max_clk; in mv_sdh_init()
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| D | bcm2835_sdhost.c | 164 unsigned int max_clk; /* Max possible freq */ member
626 div = host->max_clk / clock; in bcm2835_set_clock()
629 if ((host->max_clk / div) > clock) in bcm2835_set_clock()
636 clock = host->max_clk / (div + 2); in bcm2835_set_clock()
731 cfg->f_max = host->max_clk; in bcm2835_add_host()
732 cfg->f_min = host->max_clk / SDCDIV_MAX_CDIV; in bcm2835_add_host()
771 host->max_clk = bcm2835_get_mmc_clock(BCM2835_MBOX_CLOCK_ID_CORE); in bcm2835_probe()
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| D | dw_mmc.c | 490 u32 max_clk, u32 min_clk) argument
497 cfg->f_max = max_clk;
521 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) argument
523 dwmci_setup_cfg(&host->cfg, host, max_clk, min_clk);
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| D | pic32_sdhci.c | 58 host->max_clk = f_min_max[1]; in pic32_sdhci_probe()
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| D | rockchip_sdhci.c | 62 host->max_clk = max_frequency; in arasan_sdhci_probe()
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| D | ftsdc010_mci.c | 372 uint caps, u32 max_clk, u32 min_clk) in ftsdc_setup_cfg() argument
376 cfg->f_max = max_clk; in ftsdc_setup_cfg()
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| D | msm_sdhci.c | 98 host->max_clk = 0; in msm_sdc_probe()
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| D | bcm2835_sdhci.c | 213 host->max_clk = emmc_freq; in bcm2835_sdhci_probe()
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| D | s5p_sdhci.c | 93 host->max_clk = 52000000; in s5p_sdhci_core_init()
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| D | zynq_sdhci.c | 271 host->max_clk = clock; in arasan_sdhci_probe()
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| D | xenon_sdhci.c | 424 host->max_clk = XENON_MMC_MAX_CLK; in xenon_sdhci_probe()
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| /external/u-boot/include/ |
| D | dwmmc.h | 260 u32 max_clk, u32 min_clk);
290 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
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| D | sdhci.h | 261 unsigned int max_clk; /* Maximum Base Clock frequency */ member
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| /external/u-boot/arch/arm/mach-mvebu/include/mach/ |
| D | cpu.h | 142 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
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