| /external/libunwind/include/tdep-ia64/ |
| D | rse.h | 58 rse_skip_regs (uint64_t addr, long num_regs) in rse_skip_regs() argument
60 long delta = rse_slot_num(addr) + num_regs; in rse_skip_regs()
62 if (num_regs < 0) in rse_skip_regs()
64 return addr + ((num_regs + delta/0x3f) << 3); in rse_skip_regs()
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| /external/libunwind/src/ia64/ |
| D | Gstep.c | 70 unw_word_t sc_addr, num_regs; in linux_interrupt()
76 num_regs = c->cfm & 0x7f; in linux_interrupt()
78 num_regs = 0; in linux_interrupt()
87 *num_regsp = num_regs; /* size of frame */ in linux_interrupt()
224 unw_word_t prev_ip, prev_sp, prev_bsp, ip, num_regs; in update_frame_state() local
265 num_regs = 0; in update_frame_state()
274 if ((ret = linux_sigtramp (c, prev_cfm_loc, &num_regs)) < 0) in update_frame_state()
281 if ((ret = linux_interrupt (c, prev_cfm_loc, &num_regs, in update_frame_state()
288 if ((ret = hpux_sigtramp (c, prev_cfm_loc, &num_regs)) < 0) in update_frame_state()
311 num_regs = (c->cfm >> 7) & 0x7f; /* size of locals */ in update_frame_state()
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| D | Gscript.c | 396 int r, i, j, max, max_reg, max_when, num_regs = 0; in sort_regs() local
406 regorder[num_regs++] = r; in sort_regs()
413 for (i = max = 0; i < num_regs - 1; ++i) in sort_regs()
418 for (j = i + 1; j < num_regs; ++j) in sort_regs()
431 return num_regs; in sort_regs()
440 int num_regs, i, ret, regorder[IA64_NUM_PREGS - 3]; in build_script() local
491 num_regs = sort_regs (&sr, regorder); in build_script()
492 for (i = 0; i < num_regs; ++i) in build_script()
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_compiler.c | 79 uint8_t num_regs[TGSI_FILE_COUNT]; member
150 memset(ctx->num_regs, 0, sizeof(ctx->num_regs)); in compile_init()
173 ctx->position = ctx->num_regs[TGSI_FILE_OUTPUT]; in compile_init()
177 ctx->psize = ctx->num_regs[TGSI_FILE_OUTPUT]; in compile_init()
205 ctx->num_regs[decl->Declaration.File] = in compile_init()
206 MAX2(ctx->num_regs[decl->Declaration.File], decl->Range.Last + 1); in compile_init()
226 ctx->so->first_immediate = ctx->num_regs[TGSI_FILE_CONSTANT]; in compile_init()
253 for (i = 0; i < ctx->num_regs[TGSI_FILE_INPUT]; i++) { in compile_vtx_fetch()
309 unsigned num = idx + ctx->num_regs[TGSI_FILE_INPUT]; in get_temp_gpr()
384 num = src->Index + ctx->num_regs[TGSI_FILE_CONSTANT]; in add_src_reg()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_eu.h | 357 int num_regs,
362 int num_regs,
367 int num_regs,
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| D | brw_fs.cpp | 1464 struct brw_reg brw_reg = brw_vec1_grf(payload.num_regs + in assign_curb_setup()
1479 this->first_non_payload_grf = payload.num_regs + prog_data->curb_read_length; in assign_curb_setup()
1578 int urb_start = payload.num_regs + prog_data->base.curb_read_length; in assign_urb_setup()
1604 int grf = payload.num_regs + in convert_attr_sources_to_hw_regs()
5727 payload.num_regs = 2; in setup_fs_payload_gen6()
5739 payload.barycentric_coord_reg[i] = payload.num_regs; in setup_fs_payload_gen6()
5740 payload.num_regs += 2; in setup_fs_payload_gen6()
5742 payload.num_regs += 2; in setup_fs_payload_gen6()
5751 payload.source_depth_reg = payload.num_regs; in setup_fs_payload_gen6()
5752 payload.num_regs++; in setup_fs_payload_gen6()
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| D | brw_eu_emit.c | 599 unsigned num_regs, in gen7_set_dp_scratch_message() argument
606 assert(num_regs == 1 || num_regs == 2 || num_regs == 4 || in gen7_set_dp_scratch_message()
607 (devinfo->gen >= 8 && num_regs == 8)); in gen7_set_dp_scratch_message()
608 const unsigned block_size = (devinfo->gen >= 8 ? _mesa_logbase2(num_regs) : in gen7_set_dp_scratch_message()
609 num_regs - 1); in gen7_set_dp_scratch_message()
1968 int num_regs, in brw_oword_block_write_scratch() argument
1983 const unsigned mlen = 1 + num_regs; in brw_oword_block_write_scratch()
2058 BRW_DATAPORT_OWORD_BLOCK_DWORDS(num_regs * 8), in brw_oword_block_write_scratch()
2082 int num_regs, in brw_oword_block_read_scratch() argument
2104 const unsigned rlen = num_regs; in brw_oword_block_read_scratch()
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| D | brw_wm_iz.cpp | 167 payload.num_regs = reg; in setup_fs_payload_gen4()
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| D | brw_vec4.cpp | 1961 const unsigned num_regs = DIV_ROUND_UP(size_written, REG_SIZE); in fixup_3src_null_dest() local
1963 inst->dst = retype(dst_reg(VGRF, alloc.allocate(num_regs)), in fixup_3src_null_dest()
2248 unsigned num_regs = DIV_ROUND_UP(size_written, REG_SIZE); in lower_simd_width() local
2249 dst = retype(dst_reg(VGRF, alloc.allocate(num_regs)), in lower_simd_width()
2899 prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; in brw_compile_vs()
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| D | brw_vec4_tcs.cpp | 474 prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; in brw_compile_tcs()
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| D | brw_fs.h | 350 uint8_t num_regs; member
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| D | brw_vec4_gs_visitor.cpp | 857 prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; in brw_compile_gs()
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| D | brw_shader.cpp | 1251 prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs; in brw_compile_tes()
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| D | brw_vec4_nir.cpp | 65 const unsigned num_regs = array_elems * DIV_ROUND_UP(reg->bit_size, 32); in nir_emit_impl() local
66 nir_locals[reg->index] = dst_reg(VGRF, alloc.allocate(num_regs)); in nir_emit_impl()
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| /external/v8/src/compiler/ |
| D | register-allocator.cc | 1938 int num_regs = config()->num_double_registers(); in FixedFPLiveRangeFor() local
1944 num_regs = config()->num_float_registers(); in FixedFPLiveRangeFor()
1948 num_regs = config()->num_simd128_registers(); in FixedFPLiveRangeFor()
1956 DCHECK(index < num_regs); in FixedFPLiveRangeFor()
1957 USE(num_regs); in FixedFPLiveRangeFor()
2925 int* num_regs, int* num_codes, in GetFPRegisterSet() argument
2929 *num_regs = data()->config()->num_float_registers(); in GetFPRegisterSet()
2933 *num_regs = data()->config()->num_simd128_registers(); in GetFPRegisterSet()
2943 int num_regs = num_registers(); in FindFreeRegistersForRange() local
2949 GetFPRegisterSet(rep, &num_regs, &num_codes, &codes); in FindFreeRegistersForRange()
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| D | register-allocator.h | 1072 void GetFPRegisterSet(MachineRepresentation rep, int* num_regs,
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| /external/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nvfx_fragprog.c | 32 int num_regs; member
178 if (fpc->num_regs < (dst.index + 1)) in emit_dst()
179 fpc->num_regs = dst.index + 1; in emit_dst()
1081 fpc->num_regs = 2; in _nvfx_fragprog_translate()
1125 fp->fp_control |= (fpc->num_regs-1)/2; in _nvfx_fragprog_translate()
1127 fp->fp_control |= fpc->num_regs << NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT; in _nvfx_fragprog_translate()
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| /external/v8/src/arm/ |
| D | simulator-arm.cc | 1486 int num_regs, in ProcessPU() argument
1499 *end_address = rn_val + (num_regs * reg_size) - reg_size; in ProcessPU()
1500 rn_val = rn_val + (num_regs * reg_size); in ProcessPU()
1504 *start_address = rn_val - (num_regs * reg_size); in ProcessPU()
1511 *end_address = rn_val + (num_regs * reg_size); in ProcessPU()
1527 int num_regs = count_bits(rlist); in HandleRList() local
1532 ProcessPU(instr, num_regs, kPointerSize, &start_address, &end_address); in HandleRList()
1566 int num_regs; in HandleVList() local
1569 num_regs = instr->Immed8Value(); in HandleVList()
1571 num_regs = instr->Immed8Value() / 2; in HandleVList()
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| D | simulator-arm.h | 252 int num_regs,
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| /external/kernel-headers/original/uapi/sound/ |
| D | asoc.h | 441 __le32 num_regs; member
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| /external/v8/src/ppc/ |
| D | simulator-ppc.h | 228 void ProcessPUW(Instruction* instr, int num_regs, int operand_size,
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_serialize.c | 259 unsigned num_regs = blob_read_uint32(ctx->blob); in read_reg_list() local
260 for (unsigned i = 0; i < num_regs; i++) { in read_reg_list()
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| /external/v8/src/s390/ |
| D | simulator-s390.h | 223 void ProcessPUW(Instruction* instr, int num_regs, int operand_size,
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 1100 int num_regs = 0; in allocate_system_value_inputs() local
1155 int gpr = gpr_offset + num_regs++; in allocate_system_value_inputs()
1168 return gpr_offset + num_regs; in allocate_system_value_inputs()
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