| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | smlad11.ll | 4 ; A more complicated chain: 4 mul operations, so we expect 2 smlad calls.
11 ; CHECK: [[V12:%[0-9]+]] = call i32 @llvm.arm.smlad(i32 [[V9]], i32 [[V11]], i32 %mac1{{\.}}054)
16 ; CHECK: [[V17:%[0-9]+]] = call i32 @llvm.arm.smlad(i32 [[V14]], i32 [[V16]], i32 [[V12]])
18 ; And we don't want to see a 3rd smlad:
19 ; CHECK-NOT: call i32 @llvm.arm.smlad
21 ; CHECK: 2 arm-parallel-dsp - Number of smlad instructions generated
|
| D | smlad0.ll | 17 ; CHECK: [[V8]] = call i32 @llvm.arm.smlad(i32 [[V5]], i32 [[V7]], i32 %mac1{{\.}}026)
18 ; CHECK-NOT: call i32 @llvm.arm.smlad
20 ; CHECK-UNSUPPORTED-NOT: call i32 @llvm.arm.smlad
70 ; CHECK: [[V10]] = call i32 @llvm.arm.smlad(i32 %{{.*}}, i32 %{{.*}}, i32 %mac1{{\.}}058)
71 ; CHECK: [[V17]] = call i32 @llvm.arm.smlad(i32 %{{.*}}, i32 %{{.*}}, i32 %mac2{{\.}}057)
72 ; CHECK-NOT: call i32 @llvm.arm.smlad
|
| D | smlad1.ll | 9 ; CHECK: [[V8]] = call i32 @llvm.arm.smlad(i32 [[V5]], i32 [[V7]], i32 %mac1{{\.}}026)
55 ; CHECK-NOT: call i32 @llvm.arm.smlad
|
| D | smlad5.ll | 5 ; CHECK-NOT: call i32 @llvm.arm.smlad
|
| D | smlad10.ll | 6 ; CHECK-NOT: call i32 @llvm.arm.smlad
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| D | smlad9.ll | 6 ; CHECK-NOT: call i32 @llvm.arm.smlad
|
| D | acle-intrinsics.ll | 340 define i32 @smlad(i32 %a, i32 %b, i32 %c) nounwind {
341 ; CHECK-LABEL: smlad
342 ; CHECK: smlad r0, r0, r1, r2
343 %tmp = call i32 @llvm.arm.smlad(i32 %a, i32 %b, i32 %c)
470 declare i32 @llvm.arm.smlad(i32, i32, i32) nounwind
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| D | smlad12.ll | 5 ; CHECK-NOT: call i32 @llvm.arm.smlad
|
| D | smlad3.ll | 5 ; CHECK-NOT: call i32 @llvm.arm.smlad
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| D | smlad4.ll | 5 ; CHECK-NOT: call i32 @llvm.arm.smlad
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| D | smlad2.ll | 6 ; CHECK-NOT: call i32 @llvm.arm.smlad
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| D | smlad6.ll | 7 ; CHECK-NOT: call i32 @llvm.arm.smlad
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| D | smlad7.ll | 7 ; CHECK-NOT: call i32 @llvm.arm.smlad
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| D | smlad8.ll | 7 ; CHECK-NOT: call i32 @llvm.arm.smlad
|
| /external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/ |
| D | pitch_filter_armv6.S | 78 smlad r2, r11, r5, r2
84 smlad r2, r10, r4, r2
87 smlad r2, r11, r5, r2
112 smlad r2, r4, r7, r2
113 smlad r2, r5, r10, r2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 290 # CHECK: smlad r5, r12, r8, r11
|
| D | invalid-armv7.txt | 272 # Undefined encodings for smlad
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 290 # CHECK: smlad r5, r12, r8, r11
|
| D | invalid-armv7.txt | 272 # Undefined encodings for smlad
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 287 # CHECK: smlad r5, r12, r8, r11
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 649 0x13,0x85,0x02,0xe7 = smlad r2, r3, r5, r8
|
| D | basic-thumb2-instructions.s.cs | 722 0x23,0xfb,0x05,0x82 = smlad r2, r3, r5, r8
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1612 smlad r2, r3, r5, r8
1617 @ CHECK: smlad r2, r3, r5, r8 @ encoding: [0x13,0x85,0x02,0xe7]
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| D | basic-thumb2-instructions.s | 1852 smlad r2, r3, r5, r8
1858 @ CHECK: smlad r2, r3, r5, r8 @ encoding: [0x23,0xfb,0x05,0x82]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3063 void smlad(
3065 void smlad(Register rd, Register rn, Register rm, Register ra) { in smlad() function
3066 smlad(al, rd, rn, rm, ra); in smlad()
|