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Searched refs:v_mul_u32_u24 (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dmul.i16.ll9 ; SI: v_mul_u32_u24
19 ; SI: v_mul_u32_u24
29 ; SI: v_mul_u32_u24
Darray-ptr-calc-i64.ll7 ; SI-DAG: v_mul_u32_u24
Dknownbits-recursion.ll10 ; GCN: v_mul_u32_u24
Dllvm.amdgcn.sendmsg.ll124 ; TODO: This should use s_mul_i32 instead of v_mul_u32_u24 + v_readfirstlane!
Dmul_uint24-amdgcn.ll8 ; GCN: v_mul_u32_u24
/external/llvm/test/CodeGen/AMDGPU/
Dmul_uint24.ll8 ; SI: v_mul_u32_u24
57 ; SI-DAG: v_mul_u32_u24
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop3-convert.s229 v_mul_u32_u24 v1, v2, v3 label
Dvop_dpp.s409 v_mul_u32_u24 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
Dvop_sdwa.s406 v_mul_u32_u24 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
Dgfx7_asm_all.s33495 v_mul_u32_u24 v5, v1, v2 label
33498 v_mul_u32_u24 v255, v1, v2 label
33501 v_mul_u32_u24 v5, v255, v2 label
33504 v_mul_u32_u24 v5, s1, v2 label
33507 v_mul_u32_u24 v5, s103, v2 label
33510 v_mul_u32_u24 v5, flat_scratch_lo, v2 label
33513 v_mul_u32_u24 v5, flat_scratch_hi, v2 label
33516 v_mul_u32_u24 v5, vcc_lo, v2 label
33519 v_mul_u32_u24 v5, vcc_hi, v2 label
33522 v_mul_u32_u24 v5, tba_lo, v2 label
[all …]
Dgfx8_asm_all.s35985 v_mul_u32_u24 v5, v1, v2 label
35988 v_mul_u32_u24 v255, v1, v2 label
35991 v_mul_u32_u24 v5, v255, v2 label
35994 v_mul_u32_u24 v5, s1, v2 label
35997 v_mul_u32_u24 v5, s101, v2 label
36000 v_mul_u32_u24 v5, flat_scratch_lo, v2 label
36003 v_mul_u32_u24 v5, flat_scratch_hi, v2 label
36006 v_mul_u32_u24 v5, vcc_lo, v2 label
36009 v_mul_u32_u24 v5, vcc_hi, v2 label
36012 v_mul_u32_u24 v5, tba_lo, v2 label
[all …]
/external/llvm/test/MC/AMDGPU/
Dvop2.s158 v_mul_u32_u24 v1, v2, v3 label
Dvop_dpp.s374 v_mul_u32_u24 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
Dvop_sdwa.s381 v_mul_u32_u24 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOP2Instructions.td368 defm V_MUL_U32_U24 : VOP2Inst <"v_mul_u32_u24", VOP_I32_I32_I32, AMDGPUmul_u24>;
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst674 v_mul_u32_u24 dst, src0, src1
DAMDGPUAsmGFX8.rst891 v_mul_u32_u24 dst, src0, src1
DAMDGPUAsmGFX9.rst1056 v_mul_u32_u24 dst, src0, src1
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td1514 defm V_MUL_U32_U24 : VOP2Inst <vop2<0xb, 0x8>, "v_mul_u32_u24",