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Searched refs:v_writelane_b32 (Results 1 – 25 of 27) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dpartial-sgpr-to-vgpr-spills.ll25 ; GCN: v_writelane_b32 v0, s4, 0
26 ; GCN-NEXT: v_writelane_b32 v0, s5, 1
27 ; GCN-NEXT: v_writelane_b32 v0, s6, 2
28 ; GCN-NEXT: v_writelane_b32 v0, s7, 3
29 ; GCN-NEXT: v_writelane_b32 v0, s8, 4
30 ; GCN-NEXT: v_writelane_b32 v0, s9, 5
31 ; GCN-NEXT: v_writelane_b32 v0, s10, 6
32 ; GCN-NEXT: v_writelane_b32 v0, s11, 7
35 ; GCN: v_writelane_b32 v0, s[[TMP_LO]], 8
36 ; GCN-NEXT: v_writelane_b32 v0, s{{[0-9]+}}, 9
[all …]
Dspill-wide-sgpr.ll20 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 0
21 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 1
59 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 0
60 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 1
61 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 2
62 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 3
112 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 0
113 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 1
114 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 2
115 ; VGPR: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 3
[all …]
Dllvm.amdgcn.writelane.ll7 ; CHECK: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
16 ; CHECK: v_writelane_b32 v{{[0-9]+}}, 32, s{{[0-9]+}}
26 ; CHECK: v_writelane_b32 v{{[0-9]+}}, 12, [[LANE]]
42 ; CHECK: v_writelane_b32 v{{[0-9]+}}, [[COPY_M0]], s{{[0-9]+}}
52 ; CHECK: v_writelane_b32 v{{[0-9]+}}, s{{[0-9]+}}, 32
62 ; CHECK: v_writelane_b32 [[OLDVAL]], s{{[0-9]+}}, s{{[0-9]+}}
71 ; CHECK: v_writelane_b32 [[OLDVAL]], s{{[0-9]+}}, s{{[0-9]+}}
Dcallee-frame-setup.ll42 ; GCN-DAG: v_writelane_b32 v32, s33,
43 ; GCN-DAG: v_writelane_b32 v32, s34,
44 ; GCN-DAG: v_writelane_b32 v32, s35,
76 ; GCN-DAG: v_writelane_b32 v32, s33, 0
77 ; GCN-DAG: v_writelane_b32 v32, s34, 1
98 ; GCN: v_writelane_b32 v32
Dcall-preserved-registers.ll28 ; GCN: v_writelane_b32 v32, s33, 0
29 ; GCN: v_writelane_b32 v32, s34, 1
30 ; GCN: v_writelane_b32 v32, s35, 2
31 ; GCN: v_writelane_b32 v32, s36, 3
32 ; GCN: v_writelane_b32 v32, s37, 4
173 ; GCN: v_writelane_b32 v0, s33, 0
200 ; GCN: v_writelane_b32 v32, s40
232 ; GCN: v_writelane_b32 v33, s40
Dnested-calls.ll16 ; GCN-DAG: v_writelane_b32 v32, s33, 0
17 ; GCN-DAG: v_writelane_b32 v32, s34, 1
18 ; GCN-DAG: v_writelane_b32 v32, s35, 2
Dcontrol-flow-fastregalloc.ll25 ; VGPR: v_writelane_b32 [[SPILL_VGPR:v[0-9]+]], s[[SAVEEXEC_LO]], [[SAVEEXEC_LO_LANE:[0-9]+]]
26 ; VGPR: v_writelane_b32 [[SPILL_VGPR]], s[[SAVEEXEC_HI]], [[SAVEEXEC_HI_LANE:[0-9]+]]
109 ; VGPR: v_writelane_b32 [[SPILL_VGPR:v[0-9]+]], s[[SAVEEXEC_LO]], [[SAVEEXEC_LO_LANE:[0-9]+]]
110 ; VGPR: v_writelane_b32 [[SPILL_VGPR]], s[[SAVEEXEC_HI]], [[SAVEEXEC_HI_LANE:[0-9]+]]
187 ; VGPR: v_writelane_b32 [[SPILL_VGPR:v[0-9]+]], s[[SAVEEXEC_LO]], [[SAVEEXEC_LO_LANE:[0-9]+]]
188 ; VGPR: v_writelane_b32 [[SPILL_VGPR]], s[[SAVEEXEC_HI]], [[SAVEEXEC_HI_LANE:[0-9]+]]
222 ; VGPR: v_writelane_b32 [[SPILL_VGPR]], s[[FLOW_S_RELOAD_SAVEEXEC_LO]], [[FLOW_SAVEEXEC_LO_LANE:[0-…
223 ; VGPR: v_writelane_b32 [[SPILL_VGPR]], s[[FLOW_S_RELOAD_SAVEEXEC_HI]], [[FLOW_SAVEEXEC_HI_LANE:[0-…
Dbasic-branch.ll7 ; GCNNOOPT: v_writelane_b32
8 ; GCNNOOPT: v_writelane_b32
Dcall-graph-register-usage.ll16 ; GCN: v_writelane_b32 v32, s33, 0
17 ; GCN: v_writelane_b32 v32, s34, 1
18 ; GCN: v_writelane_b32 v32, s35, 2
Dsibling-call.ll103 ; GCN-NOT: v_writelane_b32 v{{[0-9]+}}, s32
214 ; GCN-DAG: v_writelane_b32 v34, s33, 0
215 ; GCN-DAG: v_writelane_b32 v34, s34, 1
216 ; GCN-DAG: v_writelane_b32 v34, s35, 2
Dspill-csr-frame-ptr-reg-copy.ll8 ; GCN: v_writelane_b32 v32, s5, 2
Dbyval-frame-setup.ll35 ; GCN-NOT: v_writelane_b32 v{{[0-9]+}}, s32
36 ; GCN-DAG: v_writelane_b32
73 ; GCN-DAG: v_writelane_b32
Dspill-m0.ll16 ; TOVGPR: v_writelane_b32 [[SPILL_VREG:v[0-9]+]], [[M0_COPY]], 0
/external/llvm/test/CodeGen/AMDGPU/
Dbasic-branch.ll7 ; GCNNOOPT: v_writelane_b32
8 ; GCNNOOPT: v_writelane_b32
9 ; GCNNOOPT: v_writelane_b32
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop2.s121 v_writelane_b32 v1, s2, 4 label
125 v_writelane_b32 v2, 1, s4 label
129 v_writelane_b32 v255, 0xaf123456, 2 label
Dgfx7_asm_all.s31728 v_writelane_b32 v5, 0, s2 label
31731 v_writelane_b32 v255, 0, s2 label
31734 v_writelane_b32 v5, -1, s2 label
31737 v_writelane_b32 v5, 0.5, s2 label
31740 v_writelane_b32 v5, -4.0, s2 label
31743 v_writelane_b32 v5, 0, s103 label
31746 v_writelane_b32 v5, 0, flat_scratch_lo label
31749 v_writelane_b32 v5, 0, flat_scratch_hi label
31752 v_writelane_b32 v5, 0, vcc_lo label
31755 v_writelane_b32 v5, 0, vcc_hi label
[all …]
Dgfx8_asm_all.s53916 v_writelane_b32 v5, 0, s2 label
53919 v_writelane_b32 v255, 0, s2 label
53922 v_writelane_b32 v5, -1, s2 label
53925 v_writelane_b32 v5, 0.5, s2 label
53928 v_writelane_b32 v5, -4.0, s2 label
53931 v_writelane_b32 v5, 0, s101 label
53934 v_writelane_b32 v5, 0, flat_scratch_lo label
53937 v_writelane_b32 v5, 0, flat_scratch_hi label
53940 v_writelane_b32 v5, 0, vcc_lo label
53943 v_writelane_b32 v5, 0, vcc_hi label
[all …]
/external/llvm/test/MC/AMDGPU/
Dvop2.s121 v_writelane_b32 v1, s2, s3 label
/external/llvm/test/MC/Disassembler/AMDGPU/
Dvop2_vi.txt9 # VI: v_writelane_b32 v1, s2, s3 ; encoding: [0x01,0x00,0x8a,0xd2,0x02,0x06,0x00,0x00]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dvop2_vi.txt9 # VI: v_writelane_b32 v1, s2, s3 ; encoding: [0x01,0x00,0x8a,0xd2,0x02,0x06,0x00,0x00]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOP2Instructions.td417 def V_WRITELANE_B32 : VOP2_Pseudo<"v_writelane_b32", VOP_WRITELANE,
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td1602 "v_writelane_b32",
1605 "v_writelane_b32 $vdst, $src0, $src1"
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst683 v_writelane_b32 dst, src0, src1
DAMDGPUAsmGFX8.rst1335 v_writelane_b32 dst, src0, src1 :ref:`omod<amdgpu_synid_omod>`
DAMDGPUAsmGFX9.rst1540 v_writelane_b32 dst, src0, src1 :ref:`omod<amdgpu_synid_omod>`

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