| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 74 bool IsRegInSet(SmallSet<unsigned, 32>& RegSet,
246 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) { in IsRegInSet() argument
247 if (RegSet.count(Reg)) in IsRegInSet()
252 if (RegSet.count(*Alias)) in IsRegInSet()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | RegAllocPBQP.cpp | 120 typedef std::set<unsigned> RegSet; typedef in __anonaf47a6de0111::RegAllocPBQP
139 RegSet vregsToAlloc, emptyIntervalVRegs;
195 const RegSet &vregs) { in build()
204 RegSet pregs; in build()
218 for (RegSet::const_iterator vregItr = vregs.begin(), vregEnd = vregs.end(); in build()
236 for (RegSet::const_iterator pregItr = pregs.begin(), in build()
285 for (RegSet::const_iterator vr1Itr = vregs.begin(), vrEnd = vregs.end(); in build()
291 for (RegSet::const_iterator vr2Itr = llvm::next(vr1Itr); in build()
341 const RegSet &vregs) { in build()
578 for (RegSet::const_iterator in finalizeAlloc()
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| D | MachineVerifier.cpp | 72 typedef DenseSet<unsigned> RegSet; typedef
78 RegSet regsLive;
80 RegSet regsLiveInButUnused;
102 RegSet regsKilled;
106 RegSet regsLiveOut;
110 RegSet vregsPassed;
114 RegSet vregsRequired;
129 bool addPassed(const RegSet &RS) { in addPassed()
131 for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I) in addPassed()
148 bool addRequired(const RegSet &RS) { in addRequired()
[all …]
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| D | AggressiveAntiDepBreaker.cpp | 279 SmallSet<unsigned, 4> RegSet; in AntiDepEdges() local
284 if (RegSet.count(Reg) == 0) { in AntiDepEdges()
286 RegSet.insert(Reg); in AntiDepEdges()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | RegAllocPBQP.h | 116 typedef std::set<unsigned> RegSet; typedef
130 const RegSet &vregs);
151 const RegSet &vregs);
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCRegisterInfo.h | 36 const unsigned char *const RegSet; variable
44 Allocatable(Allocable), RegsBegin(RB), RegsEnd(RE), RegSet(Bits), in MCRegisterClass()
81 return (RegSet[Byte] & (1 << InByte)) != 0; in contains()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | DelaySlotFiller.cpp | 71 bool IsRegInSet(SmallSet<unsigned, 32>& RegSet,
280 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) in IsRegInSet() argument
282 if (RegSet.count(Reg)) in IsRegInSet()
287 if (RegSet.count(*Alias)) in IsRegInSet()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiDelaySlotFiller.cpp | 70 bool isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg);
256 bool Filler::isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) { in isRegInSet() argument
259 if (RegSet.count(*AI)) in isRegInSet()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiDelaySlotFiller.cpp | 70 bool isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg);
257 bool Filler::isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) { in isRegInSet() argument
260 if (RegSet.count(*AI)) in isRegInSet()
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| /external/llvm/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 257 typedef SparseSet<IndexMaskPair> RegSet;
258 RegSet Regs;
279 RegSet::const_iterator I = Regs.find(SparseIndex);
302 RegSet::iterator I = Regs.find(SparseIndex);
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 276 using RegSet = SparseSet<IndexMaskPair>;
277 RegSet Regs;
299 RegSet::const_iterator I = Regs.find(SparseIndex);
322 RegSet::iterator I = Regs.find(SparseIndex);
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| /external/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 75 typedef DenseSet<unsigned> RegSet; typedef
83 RegSet regsLive;
86 RegSet regsLiveInButUnused;
108 RegSet regsKilled;
112 RegSet regsLiveOut;
116 RegSet vregsPassed;
120 RegSet vregsRequired;
138 bool addPassed(const RegSet &RS) { in addPassed()
140 for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I) in addPassed()
157 bool addRequired(const RegSet &RS) { in addRequired()
[all …]
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| D | RegAllocPBQP.cpp | 120 typedef std::set<unsigned> RegSet; typedef in __anon4cb6f5b20111::RegAllocPBQP
124 RegSet VRegsToAlloc, EmptyIntervalVRegs;
708 for (RegSet::const_iterator in finalizeAlloc()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 107 using RegSet = DenseSet<unsigned>; typedef
115 RegSet regsLive;
139 RegSet regsKilled;
143 RegSet regsLiveOut;
147 RegSet vregsPassed;
151 RegSet vregsRequired;
169 bool addPassed(const RegSet &RS) { in addPassed()
171 for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I) in addPassed()
188 bool addRequired(const RegSet &RS) { in addRequired()
190 for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I) in addRequired()
[all …]
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| D | RegAllocPBQP.cpp | 151 using RegSet = std::set<unsigned>; typedef in __anone52c97ea0111::RegAllocPBQP
155 RegSet VRegsToAlloc, EmptyIntervalVRegs;
749 for (RegSet::const_iterator in finalizeAlloc()
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| /external/llvm/lib/Target/Sparc/ |
| D | DelaySlotFiller.cpp | 78 bool IsRegInSet(SmallSet<unsigned, 32>& RegSet,
346 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) in IsRegInSet() argument
351 if (RegSet.count(*AI)) in IsRegInSet()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | DelaySlotFiller.cpp | 76 bool IsRegInSet(SmallSet<unsigned, 32>& RegSet,
344 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) in IsRegInSet() argument
349 if (RegSet.count(*AI)) in IsRegInSet()
|
| /external/capstone/ |
| D | MCRegisterInfo.h | 35 uint8_t *RegSet; member
|
| D | MCRegisterInfo.c | 142 return (c->RegSet[Byte] & (1 << InByte)) != 0; in MCRegisterClass_contains()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 39 const uint8_t *const RegSet; variable
75 return (RegSet[Byte] & (1 << InByte)) != 0; in contains()
|
| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 36 const uint8_t *const RegSet; variable
72 return (RegSet[Byte] & (1 << InByte)) != 0; in contains()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 135 bool isRegInSet(const BitVector &RegSet, unsigned Reg) const;
444 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet() argument
447 if (RegSet.test(*AI)) in isRegInSet()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 115 bool isRegInSet(const BitVector &RegSet, unsigned Reg) const;
416 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet() argument
419 if (RegSet.test(*AI)) in isRegInSet()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 245 void updateLiveness(std::set<unsigned> &RegSet, bool Recalc,
556 void HexagonExpandCondsets::updateLiveness(std::set<unsigned> &RegSet, in updateLiveness() argument
559 for (auto R : RegSet) { in updateLiveness()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 209 void updateLiveness(std::set<unsigned> &RegSet, bool Recalc,
551 void HexagonExpandCondsets::updateLiveness(std::set<unsigned> &RegSet, in updateLiveness() argument
554 for (unsigned R : RegSet) { in updateLiveness()
|