Searched refs:dmulu (Results 1 – 13 of 13) sorted by relevance
| /external/u-boot/arch/sh/lib/ |
| D | udivsi3_i4i.S | 76 dmulu.l r1,r4
220 dmulu.l r1,r4
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| /external/llvm/lib/Target/Mips/ |
| D | MicroMips64r6InstrInfo.td | 48 class DMULU_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dmulu", 0b010011000>;
206 class DMULU_MM64R6_DESC : MUL_MM64R6_DESC_BASE<"dmulu", GPR64Opnd, II_DMULU>;
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| D | Mips64r6InstrInfo.td | 72 class DMULU_DESC : MUL_R6_DESC_BASE<"dmulu", GPR64Opnd, II_DMUL>;
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| /external/llvm/test/MC/Mips/micromips64r6/ |
| D | valid.s | 268 dmulu $3, $4, $5 # CHECK dmulu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x98]
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| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 117 0x9d 0x10 0x64 0x00 # CHECK: dmulu $2, $3, $4
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| D | valid-mips64r6.txt | 18 0x00 0x64 0x10 0x9d # CHECK: dmulu $2, $3, $4
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 74 class DMULU_DESC : MUL_R6_DESC_BASE<"dmulu", GPR64Opnd, II_DMUL>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 118 0x9d 0x10 0x64 0x00 # CHECK: dmulu $2, $3, $4
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| D | valid-mips64r6.txt | 20 0x00 0x64 0x10 0x9d # CHECK: dmulu $2, $3, $4
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| /external/llvm/test/MC/Disassembler/Mips/micromips64r6/ |
| D | valid.txt | 264 0x58 0xa4 0x18 0x98 # CHECK: dmulu $3, $4, $5
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| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 861 void dmulu(Register rd, Register rs, Register rt);
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| D | assembler-mips64.cc | 1950 void Assembler::dmulu(Register rd, Register rs, Register rt) { in dmulu() function in v8::internal::Assembler
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenAsmMatcher.inc | 4898 "h\005dmuhu\004dmul\005dmulo\006dmulou\005dmult\006dmultu\005dmulu\004dn"
6023 …{ 3407 /* dmulu */, Mips::DMULU, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__GPR64AsmReg1_2, Feature_…
9185 …{ Feature_HasStdEnc|Feature_HasMips64r6|Feature_NotInMicroMips, 3407 /* dmulu */, MCK_GPR64AsmReg,…
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